west build failed with undefined node label 'qspi'

I found the following section in nrf52840.dtsi. But I can't find similar section in nrf52832.dtsi. Could I copy this section from nrf52840.dtsi to nrf52832.dtsi for solving west build error?

qspi: qspi@40029000 {
            compatible = "nordic,nrf-qspi";
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <0x40029000 0x1000>, <0x12000000 0x8000000>;
            reg-names = "qspi", "qspi_mm";
            interrupts = <41 NRF_DEFAULT_IRQ_PRIORITY>;
            status = "disabled";
        };

Parents
  • Hello,

    The nRF52832 does not include the QSPI peripheral, so you will need to select one of a SPI instance instead.

    Best regards,

    Vidar

  • Thanks for your reply! I have replaced QSPI with SPI. But I encounter flash_erase() failed with error code  -19.

    &spi1 {
    status = "okay";

    cs-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
    pinctrl-0 = <&spi1_default>;
    pinctrl-1 = <&spi1_sleep>;
    pinctrl-names = "default", "sleep";

    w25q32: w25q32jv@0 {
    compatible = "jedec,spi-nor";
    reg = <0>;
    spi-max-frequency = <8000000>;
    jedec-id = [ef 40 16];
    size = <0x400000>;
    has-dpd;
    t-enter-dpd = <3500>;
    t-exit-dpd = <3500>;
    };

    w25q256: w25q256jv@0 {
    compatible = "jedec,spi-nor";
    reg = <0>;
    spi-max-frequency = <8000000>;
    jedec-id = [ef 40 19];
    size = <0x2000000>;
    has-dpd;
    t-enter-dpd = <3500>;
    t-exit-dpd = <3500>;
    };
    };

    Source code to call flash_erase() is as follows.

    int flashNorInit(void)
    {
    const struct device *flash_dev;
    int rc;

    flash_dev = DEVICE_DT_GET(DT_ALIAS(spi1flash0));

    if (!device_is_ready(flash_dev)) {
    printk("%s: device not ready.\n", flash_dev->name);
    return -1;
    }

    printk("\n%s SPI flash testing\n", flash_dev->name);
    printk("==========================\n");


    /* Write protection needs to be disabled before each write or
    * erase, since the flash component turns on write protection
    * automatically after completion of write and erase
    * operations.
    */
    printk ("\nTest 1: Flash erase\n");

    /* Full flash erase if SPI_FLASH_TEST_REGION_OFFSET = 0 and
    * SPI_FLASH_SECTOR_SIZE = flash size
    */
    rc = flash_erase(flash_dev, SPI_FLASH_TEST_REGION_OFFSET,
    SPI_FLASH_SECTOR_SIZE);
    if (rc != 0) {
    printk("Flash erase failed! %d\n", rc);
    } else {
    printk("Flash erase succeeded!\n");
    }

    return 0;
    }

    Log messages are as follows.

    w25q32jv@0 SPI flash testing
    0> ==========================
    0>
    0> Test 1: Flash erase
    0> spi_nor_erase() e
    0> Flash erase failed! -19

    I have added following configuration in prj.conf. Do I need to add other configuration?

    # flash
    CONFIG_FLASH=y
    CONFIG_FLASH_JESD216_API=y
    CONFIG_FLASH_PAGE_LAYOUT=y
    CONFIG_MPU_ALLOW_FLASH_WRITE=y
    CONFIG_SOC_FLASH_NRF=y
    # SPI
    CONFIG_SPI=y
    CONFIG_SPI_NOR=y

Reply
  • Thanks for your reply! I have replaced QSPI with SPI. But I encounter flash_erase() failed with error code  -19.

    &spi1 {
    status = "okay";

    cs-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
    pinctrl-0 = <&spi1_default>;
    pinctrl-1 = <&spi1_sleep>;
    pinctrl-names = "default", "sleep";

    w25q32: w25q32jv@0 {
    compatible = "jedec,spi-nor";
    reg = <0>;
    spi-max-frequency = <8000000>;
    jedec-id = [ef 40 16];
    size = <0x400000>;
    has-dpd;
    t-enter-dpd = <3500>;
    t-exit-dpd = <3500>;
    };

    w25q256: w25q256jv@0 {
    compatible = "jedec,spi-nor";
    reg = <0>;
    spi-max-frequency = <8000000>;
    jedec-id = [ef 40 19];
    size = <0x2000000>;
    has-dpd;
    t-enter-dpd = <3500>;
    t-exit-dpd = <3500>;
    };
    };

    Source code to call flash_erase() is as follows.

    int flashNorInit(void)
    {
    const struct device *flash_dev;
    int rc;

    flash_dev = DEVICE_DT_GET(DT_ALIAS(spi1flash0));

    if (!device_is_ready(flash_dev)) {
    printk("%s: device not ready.\n", flash_dev->name);
    return -1;
    }

    printk("\n%s SPI flash testing\n", flash_dev->name);
    printk("==========================\n");


    /* Write protection needs to be disabled before each write or
    * erase, since the flash component turns on write protection
    * automatically after completion of write and erase
    * operations.
    */
    printk ("\nTest 1: Flash erase\n");

    /* Full flash erase if SPI_FLASH_TEST_REGION_OFFSET = 0 and
    * SPI_FLASH_SECTOR_SIZE = flash size
    */
    rc = flash_erase(flash_dev, SPI_FLASH_TEST_REGION_OFFSET,
    SPI_FLASH_SECTOR_SIZE);
    if (rc != 0) {
    printk("Flash erase failed! %d\n", rc);
    } else {
    printk("Flash erase succeeded!\n");
    }

    return 0;
    }

    Log messages are as follows.

    w25q32jv@0 SPI flash testing
    0> ==========================
    0>
    0> Test 1: Flash erase
    0> spi_nor_erase() e
    0> Flash erase failed! -19

    I have added following configuration in prj.conf. Do I need to add other configuration?

    # flash
    CONFIG_FLASH=y
    CONFIG_FLASH_JESD216_API=y
    CONFIG_FLASH_PAGE_LAYOUT=y
    CONFIG_MPU_ALLOW_FLASH_WRITE=y
    CONFIG_SOC_FLASH_NRF=y
    # SPI
    CONFIG_SPI=y
    CONFIG_SPI_NOR=y

Children
  • /*
     * Copyright (c) 2016 Intel Corporation.
     *
     * SPDX-License-Identifier: Apache-2.0
     */
    #include <stdio.h>
    #include <string.h>
    #include <zephyr/kernel.h>
    #include <zephyr/drivers/flash.h>
    #include <zephyr/device.h>
    #include <zephyr/devicetree.h>
    #include <zephyr/sys/printk.h>
    
    
    #if defined(CONFIG_BOARD_ADAFRUIT_FEATHER_STM32F405)
    #define SPI_FLASH_TEST_REGION_OFFSET 0xf000
    #elif defined(CONFIG_BOARD_ARTY_A7_ARM_DESIGNSTART_M1) || \
        defined(CONFIG_BOARD_ARTY_A7_ARM_DESIGNSTART_M3)
    /* The FPGA bitstream is stored in the lower 536 sectors of the flash. */
    #define SPI_FLASH_TEST_REGION_OFFSET \
        DT_REG_SIZE(DT_NODE_BY_FIXED_PARTITION_LABEL(fpga_bitstream))
    #elif defined(CONFIG_BOARD_NPCX9M6F_EVB) || \
        defined(CONFIG_BOARD_NPCX7M6FB_EVB)
    #define SPI_FLASH_TEST_REGION_OFFSET 0x7F000
    #else
    #define SPI_FLASH_TEST_REGION_OFFSET 0xff000
    #endif
    #define SPI_FLASH_SECTOR_SIZE        4096
    
    int  flashNorInit(void)
    {
        const struct device *flash_dev;
        int rc;
    
        flash_dev = DEVICE_DT_GET(DT_ALIAS(spi1flash0));
    
        if (!device_is_ready(flash_dev)) {
            printk("%s: device not ready.\n", flash_dev->name);
            return -1;
        }
    
        printk("\n%s SPI flash testing\n", flash_dev->name);
        printk("==========================\n");
    
    
        /* Write protection needs to be disabled before each write or
         * erase, since the flash component turns on write protection
         * automatically after completion of write and erase
         * operations.
         */
        printk  ("\nTest 1: Flash erase\n");
    
        /* Full flash erase if SPI_FLASH_TEST_REGION_OFFSET = 0 and
         * SPI_FLASH_SECTOR_SIZE = flash size
         */
        rc = flash_erase(flash_dev, SPI_FLASH_TEST_REGION_OFFSET,
                 SPI_FLASH_SECTOR_SIZE);
        if (rc != 0) {
            printk("Flash erase failed! %d\n", rc);
        } else {
            printk("Flash erase succeeded!\n");
        }
    
        return 0;
    }
    

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