XIAO ble sense external Flash P25Q16H not detecting all the time

[Sunil vignesh]

Hi,

  I am working on the XIAO BLE SENSE board which has nRF52840 SOC with P25Q16h 2MB flash and other sensors

I want to access the external flash to store sensor data.

Problem facing here - flash is not properly detecting all the time. on every soft reset or pin to reset . QSPI flash is not ready but when i powered off and put back ON after some time the QSPI ready and reading the data.

I took SPI-Flash example from the NCS 2.3.0
i created own board file for Xiao

void external_flash_config()
{
	const uint8_t expected[] = {0x55, 0xaa, 0x66, 0x99};
	const size_t len = sizeof(expected);
	uint8_t buf[sizeof(expected)];
	const struct device *flash_dev;
	int rc;

	flash_dev = DEVICE_DT_GET(DT_ALIAS(spi_flash0));

	if (!device_is_ready(flash_dev))
	{
		LOG_ERR("%s: device not ready.", flash_dev->name);
		return;
	}

	LOG_INF("%s SPI flash testing", flash_dev->name);
	LOG_INF("==========================");

	memset(buf, 0, len);
	rc = flash_read(flash_dev, SPI_FLASH_TEST_REGION_OFFSET, buf, len);
	if (rc != 0)
	{
		LOG_INF("Flash read failed! %d", rc);
		return;
	}

	if (memcmp(expected, buf, len) == 0)
	{
		LOG_INF("Data read matches data written. Good!!");
	}
	else
	{
		const uint8_t *wp = expected;
		const uint8_t *rp = buf;
		const uint8_t *rpe = rp + len;

		LOG_INF("Data read does not match data written!!");
		while (rp < rpe)
		{
			LOG_INF("%08x wrote %02x read %02x %s",
				   (uint32_t)(SPI_FLASH_TEST_REGION_OFFSET + (rp - buf)),
				   *wp, *rp, (*rp == *wp) ? "match" : "MISMATCH");
			++rp;
			++wp;
		}
	
	LOG_INF("Test 1: Flash erase");

	rc = flash_erase(flash_dev, SPI_FLASH_TEST_REGION_OFFSET,
					 SPI_FLASH_SECTOR_SIZE);
	if (rc != 0)
	{
		LOG_INF("Flash erase failed! %d", rc);
	}
	else
	{
		LOG_INF("Flash erase succeeded!");
	}

	LOG_INF("Test 2: Flash write");

	LOG_INF("Attempting to write %zu bytes", len);
	rc = flash_write(flash_dev, SPI_FLASH_TEST_REGION_OFFSET, expected, len);
	if (rc != 0)
	{
		LOG_INF("Flash write failed! %d", rc);
		return;
	}

	memset(buf, 0, len);
	rc = flash_read(flash_dev, SPI_FLASH_TEST_REGION_OFFSET, buf, len);
	if (rc != 0)
	{
		LOG_INF("Flash read failed! %d", rc);
		return;
	}

	if (memcmp(expected, buf, len) == 0)
	{
		LOG_INF("Data read matches data written. Good!!");
	}
	else
	{
		const uint8_t *wp = expected;
		const uint8_t *rp = buf;
		const uint8_t *rpe = rp + len;

		LOG_INF("Data read does not match data written!!");
		while (rp < rpe)
		{
			LOG_INF("%08x wrote %02x read %02x %s",
				   (uint32_t)(SPI_FLASH_TEST_REGION_OFFSET + (rp - buf)),
				   *wp, *rp, (*rp == *wp) ? "match" : "MISMATCH");
			++rp;
			++wp;
		}
	}
	}
	k_sleep(K_SECONDS(5));
	int ret = pm_device_action_run(flash_dev, PM_DEVICE_ACTION_SUSPEND);
	LOG_INF("%s suspended %d", flash_dev->name, ret);
	k_sleep(K_SECONDS(5));
	LOG_INF("sleep");
	k_sleep(K_SECONDS(1));
	pm_state_force(0u, &(struct pm_state_info){PM_STATE_SOFT_OFF, 0, 0});

}

xiao.dts

&qspi {
	status = "okay";
	pinctrl-0 = <&qspi_default>;
	pinctrl-1 = <&qspi_sleep>;
	pinctrl-names = "default", "sleep";
	p25q16h: p25q16h@0 {
		compatible = "nordic,qspi-nor";
		reg = <0>;
		// /* MX25R64 supports only pp and pp4io */
		// writeoc = "ppio";
		// /* MX25R64 supports all readoc options */
		// readoc = "readio";
		sck-frequency = <104000000>;
		quad-enable-requirements = "S2B1v1";
		jedec-id = [85 60 15];
		sfdp-bfp = [
			e5 20 f1 ff  ff ff ff 00  44 eb 08 6b  08 3b 80 bb
			ee ff ff ff  ff ff 00 ff  ff ff 00 ff  0c 20 0f 52
			10 d8 08 81
		];
		size = <16777216>;
		has-dpd;
		t-enter-dpd = <3000>;
		t-exit-dpd = <8000>;
	};
};

prj.conf

# flash configuration
CONFIG_FLASH=y
CONFIG_SPI=y
CONFIG_NORDIC_QSPI_NOR=y

CONFIG_PM=y
CONFIG_PM_DEVICE=y

# log enable
CONFIG_LOG=y
CONFIG_LOG_BUFFER_SIZE=4096
CONFIG_LOG_BACKEND_UART=y

result

Terminal ready
*** Booting Zephyr OS build v3.2.99-ncs2 ***
[00:00:00.293,945] <inf> main: p25q16h@0 SPI flash testing
[00:00:00.293,975] <inf> main: ==========================
[00:00:00.294,036] <inf> main: Data read does not match data written!!
[00:00:00.294,097] <inf> main: 000ff000 wrote 55 read ff MISMATCH
[00:00:00.294,128] <inf> main: 000ff001 wrote aa read ff MISMATCH
[00:00:00.294,158] <inf> main: 000ff002 wrote 66 read ff MISMATCH
[00:00:00.294,189] <inf> main: 000ff003 wrote 99 read ff MISMATCH
[00:00:00.294,219] <inf> main: Test 1: Flash erase
[00:00:00.344,451] <inf> main: Flash erase succeeded!
[00:00:00.344,482] <inf> main: Test 2: Flash write
[00:00:00.344,482] <inf> main: Attempting to write 4 bytes
[00:00:00.346,466] <inf> main: Data read matches data written. Good!!
[00:00:05.346,649] <inf> main: p25q16h@0 suspended 0
[00:00:10.346,771] <inf> main: sleep
*** Booting Zephyr OS build v3.2.99-ncs2 ***
[00:00:00.295,166] <err> main: p25q16h@0: device not ready.
*** Booting Zephyr OS build v3.2.99-ncs2 ***
[00:00:00.255,584] <err> main: p25q16h@0: device not ready.
*** Booting Zephyr OS build v3.2.99-ncs2 ***
[00:00:00.256,927] <err> main: p25q16h@0: device not ready.
*** Booting Zephyr OS build v3.2.99-ncs2 ***
[00:00:00.254,547] <err> main: p25q16h@0: device not ready.
*** Booting Zephyr OS build v3.2.99-ncs2 ***
[00:00:00.252,075] <err> main: p25q16h@0: device not ready.
*** Booting Zephyr OS build v3.2.99-ncs2 ***
[00:00:00.291,625] <err> main: p25q16h@0: device not ready.
*** Booting Zephyr OS build v3.2.99-ncs2 ***
[00:00:00.292,694] <err> main: p25q16h@0: device not ready.
*** Booting Zephyr OS build v3.2.99-ncs2 ***
[00:00:00.253,906] <err> main: p25q16h@0: device not ready.
*** Booting Zephyr OS build v3.2.99-ncs2 ***
[00:00:00.256,256] <err> main: p25q16h@0: device not ready.
*** Booting Zephyr OS build v3.2.99-ncs2 ***
[00:00:00.294,128] <err> main: p25q16h@0: device not ready.
*** Booting Zephyr OS build v3.2.99-ncs2 ***
[00:00:00.294,219] <err> main: p25q16h@0: device not ready.
*** Booting Zephyr OS build v3.2.99-ncs2 ***
[00:00:00.294,738] <err> main: p25q16h@0: device not ready.
*** Booting Zephyr OS build v3.2.99-ncs2 ***
[00:00:00.294,769] <err> main: p25q16h@0: device not ready.
�����*** Booting Zephyr OS build v3.2.99-ncs2 ***
[00:00:00.293,212] <inf> main: p25q16h@0 SPI flash testing
[00:00:00.293,243] <inf> main: ==========================
[00:00:00.293,304] <inf> main: Data read matches data written. Good!!
[00:00:05.293,487] <inf> main: p25q16h@0 suspended 0
[00:00:10.293,609] <inf> main: sleep
*** Booting Zephyr OS build v3.2.99-ncs2 ***
[00:00:00.295,532] <err> main: p25q16h@0: device not ready.

when flash not detect the power goes to 2mA

[Sigurd Hellesvik]

Problem facing here - flash is not properly detecting all the time. on every soft reset or pin to reset . QSPI flash is not ready but when i powered off and put back ON after some time the QSPI ready and reading the data.

Could this be a timing issue?
Try to put a short sleep before you check if the QSPI is ready. Does that help?

Does your device run a bootloader?

Does the JESD216 sample work for you?

Regards,
Sigurd Hellesvik

[Sunil vignesh]

Sigurd Hellesvik said:

Could this be a timing issue?

I'm assuming the same. As the flash is powered via GPIO, but not sure about it yet.

Sigurd Hellesvik said:

Try to put a short sleep before you check if the QSPI is ready. Does that help?

You mean a time delay (K_SLEEP()) before checking?

Sigurd Hellesvik said:

Does the JESD216 sample work for you?

I'll work that out and let you know if it changes anything.

Sigurd Hellesvik said:

Does your device run a bootloader?

Did you mean like MCUBOOT, NSIB?

-Sunil.

[Sigurd Hellesvik]

Sunil vignesh said:

You mean a time delay (K_SLEEP()) before checking?

Yes

Sunil vignesh said:

Did you mean like MCUBOOT, NSIB?

Yes

[Sunil vignesh]

Sunil vignesh said:

Does the JESD216 sample work for you?

I worked with this sample and it works until the DPD is not triggered. Once the device is suspended and resumed back, I'm getting the device busy.

Modified snippet:

uint8_t id[3];

	rc = flash_read_jedec_id(dev, id);
	if (rc == 0) {
		printf("jedec-id = [%02x %02x %02x];\n",
		       id[0], id[1], id[2]);
	} else {
		printf("JEDEC ID read failed: %d\n", rc);
	}

	if (IS_ENABLED(DT_INST_PROP(0, has_dpd))) {
		printf("\n%s has_dpd", dev->name);
	}
	k_sleep(K_SECONDS(5));
	int ret = pm_device_action_run(dev, PM_DEVICE_ACTION_SUSPEND);
	k_sleep(K_SECONDS(5));
	ret = pm_device_action_run(dev, PM_DEVICE_ACTION_RESUME);
	rc = flash_read_jedec_id(dev, id);
	if (rc == 0) {
		printf("jedec-id = [%02x %02x %02x];\n",
		       id[0], id[1], id[2]);
	} else {
		printf("JEDEC ID read failed: %d\n", rc);
	}

	if (IS_ENABLED(DT_INST_PROP(0, has_dpd))) {
		printf("\n%s has_dpd", dev->name);
	}
    

Output:

*** Booting Zephyr OS build v3.2.99-ncs2 ***
jedec-id = [85 60 15];
JEDEC ID read failed: -16

If I soft reset nRF, the flash device is not even available to read, it comes back only the power is fully isolated and connected back.

Am I missing any startup sequence?

-Sunil

[Sigurd Hellesvik]

Sunil vignesh said:

I worked with this sample and it works until the DPD is not triggered. Once the device is suspended and resumed back, I'm getting the device busy.

Looks like you changed the sample, right?
In that case, I assume that the sample did not work out-of-the-box?

Does your device run a bootloader?

Try to put a short sleep before you check if the QSPI is ready. Does that help?

[Sunil vignesh]

Sigurd Hellesvik said:

Looks like you changed the sample, right?

That's right.

Sigurd Hellesvik said:

Does your device run a bootloader?

Nope.

Sigurd Hellesvik said:

Try to put a short sleep before you check if the QSPI is ready. Does that help?

No. That didn't helped either.

One interesting thing is, the above mentioned snippet worked as expected in the DK.

Sigurd Hellesvik said:

In that case, I assume that the sample did not work out-of-the-box?

You've any theory on why you assume it might not works?