Hi, I want to implement a flow for callback/interrupt driven code. In the whole process I have to read and write data over SPI. Here I am using nrf52840 as SPI Master and ESP32 dev kit as Slave. When I try to communicate normally in a while in main.c everything works fine. But when I add the command for Send data over SPI in SPI callback handler , then I get hard fault error in next transaction while it goes to set the CS pin of SPI line.
This is the code which I am using to send command to slave
void readDataFromSlave(uint8_t slave_id, uint8_t *txBuffer, uint8_t txLength, uint8_t *rxBuffer, uint8_t rxLength)
{
int err;
struct spi_buf tx_spi_bufs[] = {
{.buf = txBuffer, .len = txLength }
};
struct spi_buf_set spi_tx_buffer_set = {
.buffers = tx_spi_bufs,
.count = 1
};
struct spi_buf rx_spi_bufs[] = {
{.buf = rxBuffer, .len = rxLength}
};
struct spi_buf_set spi_rx_buffer_set = {
.buffers = rx_spi_bufs,
.count = 1
};
if(slave_id == Cam1Slave)
{
gpio_pin_set(gpio0_dev,GPIO_0_CS,0);
#ifdef USE_CB
err = spi_transceive_cb(spi1_dev,&spi_cfg,&spi_tx_buffer_set,&spi_rx_buffer_set,SPI1CallbackHandler,rxBuffer);
#else
err = spi_transceive(spi1_dev,&spi_cfg,&spi_tx_buffer_set,&spi_rx_buffer_set);
#endif
gpio_pin_set(gpio0_dev,GPIO_0_CS,1);
}
}
This is SPI callback function I get the Hard fault issue when code reached and go for sending the command agani
void SPI1CallbackHandler(const struct device *dev, int result, void *data){
if(result == 0){
printk("SPI device %s: Device data - %d ------Transceive operation successful\n", dev->name, *(uint8_t*)data);
checkEspReady(0);
transCount++;
}
else{
printk("SPI device %s: Device data - %d -----Transceive operation failed\n", dev->name, *(uint8_t*)data);
}
}This is the overlay file for the project
// To get started, press Ctrl+Space to bring up the completion menu and view the available nodes.
// You can also use the buttons in the sidebar to perform actions on nodes.
// Actions currently available include:
// * Enabling / disabling the node
// * Adding the bus to a bus
// * Removing the node
// * Connecting ADC channels
// For more help, browse the DeviceTree documentation at https://docs.zephyrproject.org/latest/guides/dts/index.html
// You can also visit the nRF DeviceTree extension documentation at https://nrfconnect.github.io/vscode-nrf-connect/devicetree/nrfdevicetree.html
/ {
chosen {
nordic,nus-uart = &uart0;
};
};
&pinctrl {
spi1_default: spi1_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 8)>,
<NRF_PSEL(SPIM_MOSI, 1, 9)>,
<NRF_PSEL(SPIM_MISO, 0, 11)>;
};
};
spi2_default: spi2_default {
group1 {
psels = <NRF_PSEL(SPIM_MISO, 0, 13)>,
<NRF_PSEL(SPIM_MOSI, 0, 17)>,
<NRF_PSEL(SPIM_SCK, 0, 16)>;
};
};
};
&spi1 {
compatible = "nordic,nrf-spi";
status = "okay";
pinctrl-0 = <&spi1_default>;
pinctrl-1 = <&spi1_sleep>;
pinctrl-names = "default", "sleep";
};
&spi2 {
compatible = "nordic,nrf-spi";
status = "okay";
pinctrl-0 = <&spi2_default>;
pinctrl-1 = <&spi2_sleep>;
pinctrl-names = "default", "sleep";
};
&uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 24)>, <NRF_PSEL(UART_RTS, 0, 5)>, <NRF_PSEL(UART_RX, 0, 25)>;
};
group2 {
psels = <NRF_PSEL(UART_CTS, 0, 7)>;
};
};
&uart0 {
compatible = "nordic,nrf-uarte";
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
};
&spi3 {
status = "disabled";
};
// &qspi_default {
// group1 {
// psels = <NRF_PSEL(QSPI_IO2, 0, 22)>;
// };
// group2 {
// psels = <NRF_PSEL(QSPI_IO3, 1, 0)>,
// <NRF_PSEL(QSPI_IO0, 0, 23)>,
// <NRF_PSEL(QSPI_IO1, 0, 21)>,
// <NRF_PSEL(QSPI_CSN, 0, 3)>,
// <NRF_PSEL(QSPI_SCK, 0, 19)>;
// };
// };
&qspi_sleep {
group1 {
psels = <NRF_PSEL(QSPI_IO2, 0, 22)>;
};
};
/delete-node/ &{/pin-controller/spi2_sleep/group1/};
&spi1_sleep {
group1 {
psels = <NRF_PSEL(SPIM_MISO, 1, 8)>;
};
};
/delete-node/ &{/pin-controller/pwm0_default/group1/};
/delete-node/ &{/pin-controller/pwm0_sleep/group1/};
// &led0 {
// /delete-property/ gpios;
// };
// /delete-node/ &{/pin-controller/qspi_sleep/group2/};
// &led3 {
// /delete-property/ gpios;
// };
&qspi_default {
group1 {
psels = <NRF_PSEL(QSPI_IO2, 0, 22)>,
<NRF_PSEL(QSPI_IO1, 0, 21)>,
<NRF_PSEL(QSPI_IO3, 1, 0)>,
<NRF_PSEL(QSPI_SCK, 0, 19)>,
<NRF_PSEL(QSPI_IO0, 0, 23)>,
<NRF_PSEL(QSPI_CSN, 0, 3)>;
};
};
&qspi {
pinctrl-0 = <&qspi_default>;
mx25r64: mx25r6435f@0 {
compatible = "nordic,qspi-nor";
reg = <0>;
//changes for GD25Q32E
//quad-enable-requirements = "S2B1v1";
writeoc = "pp4o";
readoc = "read4io";
sck-frequency = <24000000>; //Note: Can't achieve 32MHz.
jedec-id = [c8 40 16];
size = <33554432>;
};
};
SDK - nrf connect sdk 2.4.0
Please let me know if any more details required