Ok, so please bear with me as I'm quite a greenhorn both in embedded world as in nRF series chips. My aim is to understand how deep sleep works. I might use wrong terminology too.
This is my current understanding:
I have one nRF chipset (does not matter which one specifically), let's call it chip Central which is bonded with another nRF, say chip Peripheral. Central is waiting for notifications on BLE service from Peripheral. In the meantime, it goes to deep sleep with sd_app_evt_wait() which calls underlying ARM's __WFI instruction.
Where it gets foggy:
Now, something from the outside world of CPU (radio circuitry?) on chip Central needs to listen all the time and when BLE signal is detected, it wakes up the CPU by turning on a pin which triggers CPU interrupt. Is this correct? But then "radio circuitry" runs all the time (or maybe in intervals?) and uses power?
I would also be glad for any hint on where to read up on this.