Minimize blocking time on Rev 3 nRF51822

Question

I've been reading about minimizing the amount of time that the SoftDevice blocks the CPU for, but most of the answers have to do with old revs of the chip and old versions of the stack, and recommend calling an API function which blocks the CPU less. This question is instead about what I can do to prevent hitting the maximum values listed in the SoftDevice spec. 
 The SoftDevice spec v2.0 says that the "Interrupt latency at the end of an connection event" can be a max of 510μs, and that the "Interrupt latency at the end of an advertising event" can be a max of 440μs. Other events, such as sending and receiving packets, can also block for a couple hundred microseconds. 
 This answer says that the max blocking time in general is 250μs, while this answer clarifies that the 250μs is the normal worst case with a theoretical worst case of the 510μs mentioned in the SD spec. 
 My question is: how can I avoid this theoretical worst case, and even the "most case" maximum, to get down to the average latency of 80μs mentioned in that second link? I'm trying to service the ADC interrupt as fast as possible to run a control loop, and 80μs is pretty doable whereas 510μs will get pretty dicey. 
 Thanks!

ovrebekk · Accepted Answer

The short answer is to try to send as little data as possible ;) 
 The worst case numbers in the SDS typically occur if you are sending 6 packets per connection event (which is the maximum for the S110).
If you don't send anything, or only send a single packet per connection event, the interrupt times will be much shorter. 
 Exactly how long the interrupts are depends on many factors, and isn't specified in detail, but if you have a scope available you could do some measurements on your own. Simply use the old trick where you toggle a GPIO quickly in the main loop, and observe on the scope how long the pauses in the toggling is. 
 Regards 
Torbjørn