What resistance for external pull-downs to detect them robustly?

[Hay]

I have allocated four GPIO pins to encode information about my board. I will connect external pull-down resistors to some of these pins in order to drive them low (and encode value 0). Initially I planned on mounting typical 100k resistors, but I think that's too weak since the internal pull-ups are 13k (voltage divider)? So my thinking is then to instead mount 1k resistors, which should be fine, since I can just enable the internal pull-up while reading the pin and then disable it to avoid unnecessary power consumption. Is my thinking right?

Note, as I understand, I must enable the internal pull-up while reading the pin and can't leave the pin floating, otherwise I may incorrectly detect an unconnected pin as either high/low depending on noise?

[mathiaso]

Hello, Hay!

Yes, you're thinking right.You must enable the internal pull-up while reading the pin and you need a resistor with lower value than 100k ohms.

As the nRF52840 GPIO Electrical Specification suggests, the "Input low voltage" is 0.3*VDD or lower. Thus, a voltage divider with an internal pull-up resistor of 13k ohms and an external pull-down resistor of R ohms, where you have
( R / ( R + 13k )) <= 0.3,
giving us R <= 5.57k,
should do the trick. Although, I would advice you to go a bit lower than the value calculated here, just to be sure. The 1k resistor you're suggesting sounds good.

Best regards,
Mathias