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Simultaneous PPI task priority

Let's say I add two PPIs which both trigger off of the same event. One of these PPIs is connected to the CHG[0].EN task, and the other is connected to the CHG[0].DIS task. When the event happens and the PPIs both trigger, is CHG[0] left enabled or disabled?

The TIMER module says that STOP has priority over START in similar circumstances, and I was curious if this is a defined situation for PPI as well.

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  • Very good question, upvoting +1

    The behavior is undefined. The reason is that the tasks generated by PPI can be connected to any module within the chip. And the task priority will depend on the module to which the PPI task is connected to and not just PPI itself. So we can have a general rule here that unless there is an explicit explanation about the priorities of task (Like in TIMER and GPIOTE) then we have to take it for granted that the behavior will be undefined or unpredictable (mostly because the engineer has not considered it, else it would be documented)

Reply
  • Very good question, upvoting +1

    The behavior is undefined. The reason is that the tasks generated by PPI can be connected to any module within the chip. And the task priority will depend on the module to which the PPI task is connected to and not just PPI itself. So we can have a general rule here that unless there is an explicit explanation about the priorities of task (Like in TIMER and GPIOTE) then we have to take it for granted that the behavior will be undefined or unpredictable (mostly because the engineer has not considered it, else it would be documented)

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