Once the modem is turned off (e.g. using at+cfun=0) - what will be the state of the MAGPIO pins? Will they be pulled to GND or will they float?
Thanks
Ulf
P.S. The same question counts for the COEX pins.
Once the modem is turned off (e.g. using at+cfun=0) - what will be the state of the MAGPIO pins? Will they be pulled to GND or will they float?
Thanks
Ulf
P.S. The same question counts for the COEX pins.
Hello Ulf,
When you are in eDRX mode, the MAGPIO pins will go low when the radio is not in use. This previous case https://devzone.nordicsemi.com/support/253105 may help you.
Thanks.
BR
Kazi
Hi Kazi, the link you have attached seems to be broken :-(
Hello Ulf,
Sorry it was a private case. The MAGPIO pins goes to '0' because an LDO in the nRF91 is turned off by the modem when the modem goes to sleep; regardless of PSM or eDRX mood. This is for saving power.
Hello Kazi,
Can we get more specific about this? We have a use case where we want an antenna switch control pin controlled either by the nrf91 or by another external MCU. When the nrf91 is off or between eDRX cycles, are MAGPIO pins actively pulled low or just output disconnected (high impedance)? We've dug around everywhere and can't determine the answer here.
There is a test mode command %XANTDETMAGPIO=<magpio_pin> that claims to set the pin back to high impedance after use so I know the hardware is capable of a high impedance mode. The question is, what does the radio firmware do between eDRX cycles. Internal LDO off or on, that doesn't tell me what the actual pin state is...
Thank you!
-Patrick.
Hello Kazi,
Can we get more specific about this? We have a use case where we want an antenna switch control pin controlled either by the nrf91 or by another external MCU. When the nrf91 is off or between eDRX cycles, are MAGPIO pins actively pulled low or just output disconnected (high impedance)? We've dug around everywhere and can't determine the answer here.
There is a test mode command %XANTDETMAGPIO=<magpio_pin> that claims to set the pin back to high impedance after use so I know the hardware is capable of a high impedance mode. The question is, what does the radio firmware do between eDRX cycles. Internal LDO off or on, that doesn't tell me what the actual pin state is...
Thank you!
-Patrick.
Hello Patric,
''The question is, what does the radio firmware do between eDRX cycles.''
During eDRX (Extended Discontinuous Reception) cycles, the User Equipment (UE) or device is primarily in sleep mode to save power. you can look at this chapter from Dev academy about power saving techniques of nRF9160.
'' Internal LDO off or on, that doesn't tell me what the actual pin state is...'' Could you please explain this a bit more?