Swdio/swclk shared with normal GPIO

[silvergaucho]

Hei there! First of all thanks for all the great work here!

My question is:

In my application, the final device will have 4 pogo pins. Two of them are for power, the other two for signal. These signal pins coul be connected at the same time to swdio/swclk for programming and to two normal gpio used later for I2C?

Thanks to everybody

[_Tim_]

I have one question regarding this topic.

is it possible to use the SWDIO and SWDCLK pins for programming just after power upin the first second for excample? After that the debug interface cant be started anymore. I dont want to use them as gpios or anything else. I just don't want the debug interface or reset to be started if there are some voltage levels at those pins...

do you know what I mean? Thanks in advance!

[Einar Thorsrud]

There is no support for this functionality in the nRF5 devices. There was a issue on the nRF51 where noise on the SWD interface could inadvertently trigger debug mode if you had long PCB traces and no or weak pull resistor. This is not a problem on the nRF52 though, and I have not seen any reports of accidentally activating the debug interface on a nRF52 series devices.

[Einar Thorsrud]

No, it is not possible.

[_Tim_]

ok, thats too bad! 

thanks for your help!

[_Tim_]

Hi Einar,
one more question: Do you know the switching voltage threshold for SWDIO and SWDCLK? So that there is a little bit voltage at those pins but it does not make any reset or start the debug mode?

Thanks in advantage!  

[Einar Thorsrud]

The same limitations apply here as for normal GPIO pins (see electrical specifications for GPIO in the product specification).

[_Tim_]

Ok,perfect. So with 0.6 x VDD at SWDCLK  it will not enter the debug mode.

thanks

[Einar Thorsrud]

No, that's not quite what I tried to say. When you are in the undefined region, you don't know. But as long as it is below 0.3 * VDD (nRf52832), you are good.

[_Tim_]

sure, the undefined region - thats what I forgot. thanks