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Guidelines for design to minimize ESD-caused resets of nRF51?

We're having difficulty preventing our nRF51822 from resetting when ESD events occur. These events are not directly on the nRF51's I/O pins, and we've tried things like grounding the SWDCLK and SWDIO lines, but to no avail. Compared to other MCUs, the part seems quite sensitive. Are there guidelines available which can help us benefit from the experiences of others in this area?

Thanks, Scott

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  • Hi Scott,

    Obviously adding ESD protection requires a bit of knowledge of what's actually happening and what's being affected. I am assuming you are using an ESD gun to simulate. Is your board failing with conducted, radiated or both?

    The usual approach to protect the device is to use diodes to clamp the transients and EMI ferrite beads to anything that is outside the protection, but a shotgun approach is not very efficient. Note that sometimes we've found that devices by some manufacturers don't actually work as well as they're supposed to.

    The lines to watch out for are:

    1. VCC Power line

    2. Reset line

    3. GPIO to a lesser extent

    Do you know specifically what your system is experiencing? Would be helpful to have schematics and better feel for what exactly you're seeing. Feel free to contact me directly at [email protected]

  • Hi Gustavo,

    We're using an ESD gun, with direct discharges onto battery-charging contacts. The nRF51 appears to be resetting, but it immediately comes back up in normal operating mode. We have a TVS in the circuit, but obviously it's not sufficient, and we're going to modify the PCB layout to add protection on more lines. I can't share the schematic because it's proprietary to my client.

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