MCUBOOT + SMP + External Flash, Image is flashed to the external flash, but fails to boot.

I am working on using MCUBOOT with external flash (MX25V16066M2I02) using SMP server sample https://developer.nordicsemi.com/nRF_Connect_SDK/doc/2.4.0/zephyr/samples/subsys/mgmt/mcumgr/smp_svr/README.html.

I have tested the external flash by using it as QSBI flash and it works as intended.

SMP server sample works well when using internal flash. 

I have added the required configuration and device tree overlay to enable mcuboot on external spi flash, as well as the static partition yml file. I can flash the image to the external flash, however after putting on test mode and restarting the dk, nothing changes the image remains on the pending state. I have also tried confirming the image but still same issue. I have also tired using the built-in QSBI flash same issue.

Note: I am working on nrf connect SDK 2.4 

mcuboot_secondary:
  address: 0x00000
  region: external_flash
  size: 0xf4000

external_partition:
  address: 0xf4000
  end_address: 0xf8000
  region: external_flash
  size: 0x4000

settings_storage:
  address: 0xf8000
  region: external_flash
  size: 0x4000

Static partition file.

&spi1 {
	status = "disabled";
};

&i2c0 {
	status = "disabled";
};


/ {
	chosen {
		nordic,pm-ext-flash = &mx25r64;
	};
};

&pinctrl {
	qspi_default: qspi_default {
		group1 {
			psels = <NRF_PSEL(QSPI_SCK, 0,31)>,
					<NRF_PSEL(QSPI_IO0, 0, 30)>, // mosi
					<NRF_PSEL(QSPI_IO1, 1, 8)>, // miso
					<NRF_PSEL(QSPI_IO2, 0, 26)>, // wps
					<NRF_PSEL(QSPI_IO3, 0, 27)>,//res
					<NRF_PSEL(QSPI_CSN, 1, 10)>;
		};
	};

	qspi_sleep: qspi_sleep {
		group1 {
			psels = <NRF_PSEL(QSPI_SCK, 0, 31)>,
					<NRF_PSEL(QSPI_IO0, 0, 30)>, // mosi
					<NRF_PSEL(QSPI_IO1, 1, 8)>, // miso
					<NRF_PSEL(QSPI_IO2, 0, 26)>, // wps
					<NRF_PSEL(QSPI_IO3, 0, 27)>; //res
					low-power-enable;
		};
		group2 {
			psels = <NRF_PSEL(QSPI_CSN, 1, 10)>;
			low-power-enable;
			bias-pull-up;
		};
	};
};





&qspi {
	status = "okay";
	mx25r64: mx25r6435f@0 {
		compatible = "nordic,qspi-nor";
		reg = <0>;
		/* MX25R64 supports only pp and pp4io */
		writeoc = "pp";
		/* MX25R64 supports all readoc options */
		readoc = "fastread";
		sck-frequency = <8000000>;
		jedec-id = [ c2 20 15  ];
		sfdp-bfp = [ e5 20 f1 ff ff ff ff 03 44 eb 08 6b 08 3b 04 bb ee ff ff ff ff ff 00 ff ff ff 00 ff 0c 20 0f 52 10 d8 00 ff 23 72 f5 00 82 ed 04 cc 44 83 68 44 30 b0 30 b0 f7 c4 d5 5c 00 be 29 ff f0 d0 ff ff  ];

		size = <16777216>;
		has-dpd;
		t-enter-dpd = <10000>;
		t-exit-dpd = <35000>;

	};


};

Overlay file.

# Enable MCUmgr and dependencies.
CONFIG_NET_BUF=y
CONFIG_ZCBOR=y
CONFIG_CRC=y
CONFIG_MCUMGR=y
CONFIG_STREAM_FLASH=y
CONFIG_FLASH_MAP=y

# Some command handlers require a large stack.
CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=10240
CONFIG_MAIN_STACK_SIZE=10240

# Ensure an MCUboot-compatible binary is generated.
CONFIG_BOOTLOADER_MCUBOOT=y

# Enable flash operations.
CONFIG_FLASH=y

# Required by the `taskstat` command.
CONFIG_THREAD_MONITOR=y

# Support for taskstat command
CONFIG_MCUMGR_GRP_OS_TASKSTAT=y

# Enable statistics and statistic names.
CONFIG_STATS=y
CONFIG_STATS_NAMES=y

# Enable most core commands.
CONFIG_FLASH=y
CONFIG_IMG_MANAGER=y
CONFIG_MCUMGR_GRP_IMG=y
CONFIG_MCUMGR_GRP_OS=y
CONFIG_MCUMGR_GRP_STAT=y

# Enable logging
CONFIG_LOG=y
CONFIG_MCUBOOT_UTIL_LOG_LEVEL_WRN=y

# Disable debug logging
CONFIG_LOG_MAX_LEVEL=3


CONFIG_NORDIC_QSPI_NOR=y
CONFIG_NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096
CONFIG_NORDIC_QSPI_NOR_STACK_WRITE_BUFFER_SIZE=16


# Other configurations
CONFIG_MULTITHREADING=y
CONFIG_UART_CONSOLE=n

prj.conf file

# Enable the serial MCUmgr transport.
CONFIG_BASE64=y
CONFIG_MCUMGR_TRANSPORT_UART=y
CONFIG_CONSOLE=y

overlay-serial.conf file

mcumgr conn add my_device type="serial" connstring="dev=COM20,baud=115200,mtu=512"

Command used to create the profile.

C:\ncs\v2.4.0\zephyr\samples\basic\blinky\build\zephyr>mcumgr image list -c my_device
Images:
 image=0 slot=0
    version: 0.0.0
    bootable: true
    flags: active confirmed
    hash: b350f73c26233662e6b8220adb29b0279a9838ff8b94fe6f769c0a4870e62fee
Split status: N/A (0)

C:\ncs\v2.4.0\zephyr\samples\basic\blinky\build\zephyr>
C:\ncs\v2.4.0\zephyr\samples\basic\blinky\build\zephyr>mcumgr image upload app_update.bin -c my_device
 51.28 KiB / 51.28 KiB [=======================================================================] 100.00% 1.35 KiB/s 37s
Done

C:\ncs\v2.4.0\zephyr\samples\basic\blinky\build\zephyr>mcumgr image list -c my_device
Images:
 image=0 slot=0
    version: 0.0.0
    bootable: true
    flags: active confirmed
    hash: b350f73c26233662e6b8220adb29b0279a9838ff8b94fe6f769c0a4870e62fee
 image=0 slot=1
    version: 0.0.0
    bootable: true
    flags: pending
    hash: 98f5cc2fc4f6505bb601a5ac984d2bf1911b748cddd2228fa324ed5a3a0210be
Split status: N/A (0)

C:\ncs\v2.4.0\zephyr\samples\basic\blinky\build\zephyr>mcumgr image test 98f5cc2fc4f6505bb601a5ac984d2bf1911b748cddd2228fa324ed5a3a0210be -c my_device
Images:
 image=0 slot=0
    version: 0.0.0
    bootable: true
    flags: active confirmed
    hash: b350f73c26233662e6b8220adb29b0279a9838ff8b94fe6f769c0a4870e62fee
 image=0 slot=1
    version: 0.0.0
    bootable: true
    flags: pending
    hash: 98f5cc2fc4f6505bb601a5ac984d2bf1911b748cddd2228fa324ed5a3a0210be
Split status: N/A (0)

C:\ncs\v2.4.0\zephyr\samples\basic\blinky\build\zephyr>mcumgr image list -c my_device
Images:
 image=0 slot=0
    version: 0.0.0
    bootable: true
    flags: active confirmed
    hash: b350f73c26233662e6b8220adb29b0279a9838ff8b94fe6f769c0a4870e62fee
 image=0 slot=1
    version: 0.0.0
    bootable: true
    flags: pending
    hash: 98f5cc2fc4f6505bb601a5ac984d2bf1911b748cddd2228fa324ed5a3a0210be
Split status: N/A (0)

C:\ncs\v2.4.0\zephyr\samples\basic\blinky\build\zephyr>mcumgr erase -c my_device
Error: unknown command "erase" for "mcumgr"

Did you mean this?
        crash

Run 'mcumgr --help' for usage.

C:\ncs\v2.4.0\zephyr\samples\basic\blinky\build\zephyr>mcumgr image erase -c my_device
Error: 6

C:\ncs\v2.4.0\zephyr\samples\basic\blinky\build\zephyr>

terminal snippet

  • Hello,

    Please confirm that the overlay file has also been applied to the MCUBoot child image, and not just the application. You can do this by inspecting the generated <build dir>/mcuboot/zephyr/zephyr.dts file.

    Best regards,

    Vidar

  • Hello,
    Firstly Thank you very much for your effort and response.

    I have checked the file it seems the overlay is not applied to the MCUBoot child image. However I am not sure how to solve this!

    	chosen {
    		zephyr,entropy = &cryptocell;
    		zephyr,flash-controller = &flash_controller;
    		zephyr,console = &uart0;
    		zephyr,shell-uart = &uart0;
    		zephyr,uart-mcumgr = &uart0;
    		zephyr,bt-mon-uart = &uart0;
    		zephyr,bt-c2h-uart = &uart0;
    		zephyr,sram = &sram0;
    		zephyr,flash = &flash0;
    		zephyr,code-partition = &slot0_partition;
    		zephyr,ieee802154 = &ieee802154;
    	};

    This is chosen snippet from the /mcuboot/zephyr/zephyr.dts file.

    /dts-v1/;
    
    / {
    	#address-cells = < 0x1 >;
    	#size-cells = < 0x1 >;
    	model = "Nordic nRF52840 DK NRF52840";
    	compatible = "nordic,nrf52840-dk-nrf52840";
    	chosen {
    		zephyr,entropy = &cryptocell;
    		zephyr,flash-controller = &flash_controller;
    		zephyr,console = &uart0;
    		zephyr,shell-uart = &uart0;
    		zephyr,uart-mcumgr = &uart0;
    		zephyr,bt-mon-uart = &uart0;
    		zephyr,bt-c2h-uart = &uart0;
    		zephyr,sram = &sram0;
    		zephyr,flash = &flash0;
    		zephyr,code-partition = &slot0_partition;
    		zephyr,ieee802154 = &ieee802154;
    	};
    	aliases {
    		led0 = &led0;
    		led1 = &led1;
    		led2 = &led2;
    		led3 = &led3;
    		pwm-led0 = &pwm_led0;
    		sw0 = &button0;
    		sw1 = &button1;
    		sw2 = &button2;
    		sw3 = &button3;
    		bootloader-led0 = &led0;
    		mcuboot-button0 = &button0;
    		mcuboot-led0 = &led0;
    		watchdog0 = &wdt0;
    		spi-flash0 = &mx25r64;
    	};
    	soc {
    		#address-cells = < 0x1 >;
    		#size-cells = < 0x1 >;
    		compatible = "nordic,nRF52840-QIAA", "nordic,nRF52840", "nordic,nRF52", "simple-bus";
    		interrupt-parent = < &nvic >;
    		ranges;
    		nvic: interrupt-controller@e000e100 {
    			#address-cells = < 0x1 >;
    			compatible = "arm,v7m-nvic";
    			reg = < 0xe000e100 0xc00 >;
    			interrupt-controller;
    			#interrupt-cells = < 0x2 >;
    			arm,num-irq-priority-bits = < 0x3 >;
    			phandle = < 0x1 >;
    		};
    		systick: timer@e000e010 {
    			compatible = "arm,armv7m-systick";
    			reg = < 0xe000e010 0x10 >;
    			status = "disabled";
    		};
    		ficr: ficr@10000000 {
    			compatible = "nordic,nrf-ficr";
    			reg = < 0x10000000 0x1000 >;
    			status = "okay";
    		};
    		uicr: uicr@10001000 {
    			compatible = "nordic,nrf-uicr";
    			reg = < 0x10001000 0x1000 >;
    			status = "okay";
    		};
    		sram0: memory@20000000 {
    			compatible = "mmio-sram";
    			reg = < 0x20000000 0x40000 >;
    		};
    		clock: clock@40000000 {
    			compatible = "nordic,nrf-clock";
    			reg = < 0x40000000 0x1000 >;
    			interrupts = < 0x0 0x1 >;
    			status = "okay";
    		};
    		power: power@40000000 {
    			compatible = "nordic,nrf-power";
    			reg = < 0x40000000 0x1000 >;
    			interrupts = < 0x0 0x1 >;
    			status = "okay";
    			#address-cells = < 0x1 >;
    			#size-cells = < 0x1 >;
    			gpregret1: gpregret1@4000051c {
    				compatible = "nordic,nrf-gpregret";
    				reg = < 0x4000051c 0x1 >;
    				status = "okay";
    			};
    			gpregret2: gpregret2@40000520 {
    				compatible = "nordic,nrf-gpregret";
    				reg = < 0x40000520 0x1 >;
    				status = "okay";
    			};
    		};
    		radio: radio@40001000 {
    			compatible = "nordic,nrf-radio";
    			reg = < 0x40001000 0x1000 >;
    			interrupts = < 0x1 0x1 >;
    			status = "okay";
    			ieee802154-supported;
    			ble-2mbps-supported;
    			ble-coded-phy-supported;
    			tx-high-power-supported;
    			ieee802154: ieee802154 {
    				compatible = "nordic,nrf-ieee802154";
    				status = "okay";
    			};
    		};
    		uart0: uart@40002000 {
    			compatible = "nordic,nrf-uarte";
    			reg = < 0x40002000 0x1000 >;
    			interrupts = < 0x2 0x1 >;
    			status = "okay";
    			current-speed = < 0x1c200 >;
    			pinctrl-0 = < &uart0_default >;
    			pinctrl-1 = < &uart0_sleep >;
    			pinctrl-names = "default", "sleep";
    		};
    		i2c0: arduino_i2c: i2c@40003000 {
    			compatible = "nordic,nrf-twi";
    			#address-cells = < 0x1 >;
    			#size-cells = < 0x0 >;
    			reg = < 0x40003000 0x1000 >;
    			clock-frequency = < 0x186a0 >;
    			interrupts = < 0x3 0x1 >;
    			status = "okay";
    			pinctrl-0 = < &i2c0_default >;
    			pinctrl-1 = < &i2c0_sleep >;
    			pinctrl-names = "default", "sleep";
    		};
    		spi0: spi@40003000 {
    			compatible = "nordic,nrf-spi";
    			#address-cells = < 0x1 >;
    			#size-cells = < 0x0 >;
    			reg = < 0x40003000 0x1000 >;
    			interrupts = < 0x3 0x1 >;
    			max-frequency = < 0x7a1200 >;
    			easydma-maxcnt-bits = < 0x10 >;
    			status = "disabled";
    			pinctrl-0 = < &spi0_default >;
    			pinctrl-1 = < &spi0_sleep >;
    			pinctrl-names = "default", "sleep";
    		};
    		i2c1: i2c@40004000 {
    			compatible = "nordic,nrf-twi";
    			#address-cells = < 0x1 >;
    			#size-cells = < 0x0 >;
    			reg = < 0x40004000 0x1000 >;
    			clock-frequency = < 0x186a0 >;
    			interrupts = < 0x4 0x1 >;
    			status = "disabled";
    			pinctrl-0 = < &i2c1_default >;
    			pinctrl-1 = < &i2c1_sleep >;
    			pinctrl-names = "default", "sleep";
    		};
    		spi1: spi@40004000 {
    			compatible = "nordic,nrf-spi";
    			#address-cells = < 0x1 >;
    			#size-cells = < 0x0 >;
    			reg = < 0x40004000 0x1000 >;
    			interrupts = < 0x4 0x1 >;
    			max-frequency = < 0x7a1200 >;
    			easydma-maxcnt-bits = < 0x10 >;
    			status = "okay";
    			pinctrl-0 = < &spi1_default >;
    			pinctrl-1 = < &spi1_sleep >;
    			pinctrl-names = "default", "sleep";
    		};
    		nfct: nfct@40005000 {
    			compatible = "nordic,nrf-nfct";
    			reg = < 0x40005000 0x1000 >;
    			interrupts = < 0x5 0x1 >;
    			status = "okay";
    		};
    		gpiote: gpiote@40006000 {
    			compatible = "nordic,nrf-gpiote";
    			reg = < 0x40006000 0x1000 >;
    			interrupts = < 0x6 0x5 >;
    			status = "okay";
    		};
    		adc: adc@40007000 {
    			compatible = "nordic,nrf-saadc";
    			reg = < 0x40007000 0x1000 >;
    			interrupts = < 0x7 0x1 >;
    			status = "okay";
    			#io-channel-cells = < 0x1 >;
    			phandle = < 0x1b >;
    		};
    		timer0: timer@40008000 {
    			compatible = "nordic,nrf-timer";
    			status = "disabled";
    			reg = < 0x40008000 0x1000 >;
    			cc-num = < 0x4 >;
    			max-bit-width = < 0x20 >;
    			interrupts = < 0x8 0x1 >;
    			prescaler = < 0x0 >;
    		};
    		timer1: timer@40009000 {
    			compatible = "nordic,nrf-timer";
    			status = "disabled";
    			reg = < 0x40009000 0x1000 >;
    			cc-num = < 0x4 >;
    			max-bit-width = < 0x20 >;
    			interrupts = < 0x9 0x1 >;
    			prescaler = < 0x0 >;
    		};
    		timer2: timer@4000a000 {
    			compatible = "nordic,nrf-timer";
    			status = "disabled";
    			reg = < 0x4000a000 0x1000 >;
    			cc-num = < 0x4 >;
    			max-bit-width = < 0x20 >;
    			interrupts = < 0xa 0x1 >;
    			prescaler = < 0x0 >;
    			phandle = < 0x17 >;
    		};
    		rtc0: rtc@4000b000 {
    			compatible = "nordic,nrf-rtc";
    			reg = < 0x4000b000 0x1000 >;
    			cc-num = < 0x3 >;
    			interrupts = < 0xb 0x1 >;
    			status = "disabled";
    			clock-frequency = < 0x8000 >;
    			prescaler = < 0x1 >;
    		};
    		temp: temp@4000c000 {
    			compatible = "nordic,nrf-temp";
    			reg = < 0x4000c000 0x1000 >;
    			interrupts = < 0xc 0x1 >;
    			status = "okay";
    		};
    		rng: random@4000d000 {
    			compatible = "nordic,nrf-rng";
    			reg = < 0x4000d000 0x1000 >;
    			interrupts = < 0xd 0x1 >;
    			status = "okay";
    		};
    		ecb: ecb@4000e000 {
    			compatible = "nordic,nrf-ecb";
    			reg = < 0x4000e000 0x1000 >;
    			interrupts = < 0xe 0x1 >;
    			status = "okay";
    		};
    		ccm: ccm@4000f000 {
    			compatible = "nordic,nrf-ccm";
    			reg = < 0x4000f000 0x1000 >;
    			interrupts = < 0xf 0x1 >;
    			length-field-length-8-bits;
    			status = "okay";
    		};
    		wdt: wdt0: watchdog@40010000 {
    			compatible = "nordic,nrf-wdt";
    			reg = < 0x40010000 0x1000 >;
    			interrupts = < 0x10 0x1 >;
    			status = "okay";
    		};
    		rtc1: rtc@40011000 {
    			compatible = "nordic,nrf-rtc";
    			reg = < 0x40011000 0x1000 >;
    			cc-num = < 0x4 >;
    			interrupts = < 0x11 0x1 >;
    			status = "disabled";
    			clock-frequency = < 0x8000 >;
    			prescaler = < 0x1 >;
    		};
    		qdec: qdec0: qdec@40012000 {
    			compatible = "nordic,nrf-qdec";
    			reg = < 0x40012000 0x1000 >;
    			interrupts = < 0x12 0x1 >;
    			status = "disabled";
    		};
    		comp: comparator@40013000 {
    			compatible = "nordic,nrf-comp";
    			reg = < 0x40013000 0x1000 >;
    			interrupts = < 0x13 0x1 >;
    			status = "disabled";
    			#io-channel-cells = < 0x1 >;
    		};
    		egu0: swi0: egu@40014000 {
    			compatible = "nordic,nrf-egu", "nordic,nrf-swi";
    			reg = < 0x40014000 0x1000 >;
    			interrupts = < 0x14 0x1 >;
    			status = "okay";
    		};
    		egu1: swi1: egu@40015000 {
    			compatible = "nordic,nrf-egu", "nordic,nrf-swi";
    			reg = < 0x40015000 0x1000 >;
    			interrupts = < 0x15 0x1 >;
    			status = "okay";
    		};
    		egu2: swi2: egu@40016000 {
    			compatible = "nordic,nrf-egu", "nordic,nrf-swi";
    			reg = < 0x40016000 0x1000 >;
    			interrupts = < 0x16 0x1 >;
    			status = "okay";
    		};
    		egu3: swi3: egu@40017000 {
    			compatible = "nordic,nrf-egu", "nordic,nrf-swi";
    			reg = < 0x40017000 0x1000 >;
    			interrupts = < 0x17 0x1 >;
    			status = "okay";
    		};
    		egu4: swi4: egu@40018000 {
    			compatible = "nordic,nrf-egu", "nordic,nrf-swi";
    			reg = < 0x40018000 0x1000 >;
    			interrupts = < 0x18 0x1 >;
    			status = "okay";
    		};
    		egu5: swi5: egu@40019000 {
    			compatible = "nordic,nrf-egu", "nordic,nrf-swi";
    			reg = < 0x40019000 0x1000 >;
    			interrupts = < 0x19 0x1 >;
    			status = "okay";
    		};
    		timer3: timer@4001a000 {
    			compatible = "nordic,nrf-timer";
    			status = "disabled";
    			reg = < 0x4001a000 0x1000 >;
    			cc-num = < 0x6 >;
    			max-bit-width = < 0x20 >;
    			interrupts = < 0x1a 0x1 >;
    			prescaler = < 0x0 >;
    		};
    		timer4: timer@4001b000 {
    			compatible = "nordic,nrf-timer";
    			status = "disabled";
    			reg = < 0x4001b000 0x1000 >;
    			cc-num = < 0x6 >;
    			max-bit-width = < 0x20 >;
    			interrupts = < 0x1b 0x1 >;
    			prescaler = < 0x0 >;
    		};
    		pwm0: pwm@4001c000 {
    			compatible = "nordic,nrf-pwm";
    			reg = < 0x4001c000 0x1000 >;
    			interrupts = < 0x1c 0x1 >;
    			status = "okay";
    			#pwm-cells = < 0x3 >;
    			pinctrl-0 = < &pwm0_default >;
    			pinctrl-1 = < &pwm0_sleep >;
    			pinctrl-names = "default", "sleep";
    			phandle = < 0x19 >;
    		};
    		pdm0: pdm@4001d000 {
    			compatible = "nordic,nrf-pdm";
    			reg = < 0x4001d000 0x1000 >;
    			interrupts = < 0x1d 0x1 >;
    			status = "disabled";
    		};
    		acl: acl@4001e000 {
    			compatible = "nordic,nrf-acl";
    			reg = < 0x4001e000 0x1000 >;
    			status = "okay";
    		};
    		flash_controller: flash-controller@4001e000 {
    			compatible = "nordic,nrf52-flash-controller";
    			reg = < 0x4001e000 0x1000 >;
    			partial-erase;
    			#address-cells = < 0x1 >;
    			#size-cells = < 0x1 >;
    			flash0: flash@0 {
    				compatible = "soc-nv-flash";
    				erase-block-size = < 0x1000 >;
    				write-block-size = < 0x4 >;
    				reg = < 0x0 0x100000 >;
    				partitions {
    					compatible = "fixed-partitions";
    					#address-cells = < 0x1 >;
    					#size-cells = < 0x1 >;
    					boot_partition: partition@0 {
    						label = "mcuboot";
    						reg = < 0x0 0xc000 >;
    					};
    					slot0_partition: partition@c000 {
    						label = "image-0";
    						reg = < 0xc000 0x76000 >;
    					};
    					slot1_partition: partition@82000 {
    						label = "image-1";
    						reg = < 0x82000 0x76000 >;
    					};
    					storage_partition: partition@f8000 {
    						label = "storage";
    						reg = < 0xf8000 0x8000 >;
    					};
    				};
    			};
    		};
    		ppi: ppi@4001f000 {
    			compatible = "nordic,nrf-ppi";
    			reg = < 0x4001f000 0x1000 >;
    			status = "okay";
    		};
    		mwu: mwu@40020000 {
    			compatible = "nordic,nrf-mwu";
    			reg = < 0x40020000 0x1000 >;
    			status = "okay";
    		};
    		pwm1: pwm@40021000 {
    			compatible = "nordic,nrf-pwm";
    			reg = < 0x40021000 0x1000 >;
    			interrupts = < 0x21 0x1 >;
    			status = "disabled";
    			#pwm-cells = < 0x3 >;
    		};
    		pwm2: pwm@40022000 {
    			compatible = "nordic,nrf-pwm";
    			reg = < 0x40022000 0x1000 >;
    			interrupts = < 0x22 0x1 >;
    			status = "disabled";
    			#pwm-cells = < 0x3 >;
    		};
    		spi2: spi@40023000 {
    			compatible = "nordic,nrf-spi";
    			#address-cells = < 0x1 >;
    			#size-cells = < 0x0 >;
    			reg = < 0x40023000 0x1000 >;
    			interrupts = < 0x23 0x1 >;
    			max-frequency = < 0x7a1200 >;
    			easydma-maxcnt-bits = < 0x10 >;
    			status = "disabled";
    			pinctrl-0 = < &spi2_default >;
    			pinctrl-1 = < &spi2_sleep >;
    			pinctrl-names = "default", "sleep";
    		};
    		rtc2: rtc@40024000 {
    			compatible = "nordic,nrf-rtc";
    			reg = < 0x40024000 0x1000 >;
    			cc-num = < 0x4 >;
    			interrupts = < 0x24 0x1 >;
    			status = "disabled";
    			clock-frequency = < 0x8000 >;
    			prescaler = < 0x1 >;
    		};
    		i2s0: i2s@40025000 {
    			compatible = "nordic,nrf-i2s";
    			#address-cells = < 0x1 >;
    			#size-cells = < 0x0 >;
    			reg = < 0x40025000 0x1000 >;
    			interrupts = < 0x25 0x1 >;
    			status = "disabled";
    		};
    		usbd: zephyr_udc0: usbd@40027000 {
    			compatible = "nordic,nrf-usbd";
    			reg = < 0x40027000 0x1000 >;
    			interrupts = < 0x27 0x1 >;
    			num-bidir-endpoints = < 0x1 >;
    			num-in-endpoints = < 0x7 >;
    			num-out-endpoints = < 0x7 >;
    			num-isoin-endpoints = < 0x1 >;
    			num-isoout-endpoints = < 0x1 >;
    			status = "okay";
    			cdc_acm_uart0: cdc_acm_uart0 {
    				compatible = "zephyr,cdc-acm-uart";
    			};
    		};
    		uart1: arduino_serial: uart@40028000 {
    			compatible = "nordic,nrf-uarte";
    			reg = < 0x40028000 0x1000 >;
    			interrupts = < 0x28 0x1 >;
    			status = "disabled";
    			current-speed = < 0x1c200 >;
    			pinctrl-0 = < &uart1_default >;
    			pinctrl-1 = < &uart1_sleep >;
    			pinctrl-names = "default", "sleep";
    		};
    		qspi: qspi@40029000 {
    			compatible = "nordic,nrf-qspi";
    			#address-cells = < 0x1 >;
    			#size-cells = < 0x0 >;
    			reg = < 0x40029000 0x1000 >, < 0x12000000 0x8000000 >;
    			reg-names = "qspi", "qspi_mm";
    			interrupts = < 0x29 0x1 >;
    			status = "okay";
    			pinctrl-0 = < &qspi_default >;
    			pinctrl-1 = < &qspi_sleep >;
    			pinctrl-names = "default", "sleep";
    			mx25r64: mx25r6435f@0 {
    				compatible = "nordic,qspi-nor";
    				reg = < 0x0 >;
    				writeoc = "pp4io";
    				readoc = "read4io";
    				sck-frequency = < 0x7a1200 >;
    				jedec-id = [ C2 28 17 ];
    				sfdp-bfp = [ E5 20 F1 FF FF FF FF 03 44 EB 08 6B 08 3B 04 BB EE FF FF FF FF FF 00 FF FF FF 00 FF 0C 20 0F 52 10 D8 00 FF 23 72 F5 00 82 ED 04 CC 44 83 68 44 30 B0 30 B0 F7 C4 D5 5C 00 BE 29 FF F0 D0 FF FF ];
    				size = < 0x4000000 >;
    				has-dpd;
    				t-enter-dpd = < 0x2710 >;
    				t-exit-dpd = < 0x88b8 >;
    			};
    		};
    		pwm3: pwm@4002d000 {
    			compatible = "nordic,nrf-pwm";
    			reg = < 0x4002d000 0x1000 >;
    			interrupts = < 0x2d 0x1 >;
    			status = "disabled";
    			#pwm-cells = < 0x3 >;
    		};
    		spi3: arduino_spi: spi@4002f000 {
    			compatible = "nordic,nrf-spim";
    			#address-cells = < 0x1 >;
    			#size-cells = < 0x0 >;
    			reg = < 0x4002f000 0x1000 >;
    			interrupts = < 0x2f 0x1 >;
    			max-frequency = < 0x1e84800 >;
    			easydma-maxcnt-bits = < 0x10 >;
    			rx-delay-supported;
    			rx-delay = < 0x2 >;
    			status = "okay";
    			cs-gpios = < &arduino_header 0x10 0x1 >;
    			pinctrl-0 = < &spi3_default >;
    			pinctrl-1 = < &spi3_sleep >;
    			pinctrl-names = "default", "sleep";
    		};
    		gpio0: gpio@50000000 {
    			compatible = "nordic,nrf-gpio";
    			gpio-controller;
    			reg = < 0x50000000 0x200 0x50000500 0x300 >;
    			#gpio-cells = < 0x2 >;
    			status = "okay";
    			port = < 0x0 >;
    			phandle = < 0x18 >;
    		};
    		gpio1: gpio@50000300 {
    			compatible = "nordic,nrf-gpio";
    			gpio-controller;
    			reg = < 0x50000300 0x200 0x50000800 0x300 >;
    			#gpio-cells = < 0x2 >;
    			ngpios = < 0x10 >;
    			status = "okay";
    			port = < 0x1 >;
    			phandle = < 0x1a >;
    		};
    		cryptocell: crypto@5002a000 {
    			compatible = "nordic,nrf-cc310";
    			reg = < 0x5002a000 0x1000 >;
    			status = "okay";
    			#address-cells = < 0x1 >;
    			#size-cells = < 0x1 >;
    			cryptocell310: crypto@5002b000 {
    				compatible = "arm,cryptocell-310";
    				reg = < 0x5002b000 0x1000 >;
    				interrupts = < 0x2a 0x1 >;
    			};
    		};
    	};
    	pinctrl: pin-controller {
    		compatible = "nordic,nrf-pinctrl";
    		uart0_default: uart0_default {
    			phandle = < 0x2 >;
    			group1 {
    				psels = < 0x6 >, < 0x20005 >;
    			};
    			group2 {
    				psels = < 0x10008 >, < 0x30007 >;
    				bias-pull-up;
    			};
    		};
    		uart0_sleep: uart0_sleep {
    			phandle = < 0x3 >;
    			group1 {
    				psels = < 0x6 >, < 0x10008 >, < 0x20005 >, < 0x30007 >;
    				low-power-enable;
    			};
    		};
    		uart1_default: uart1_default {
    			phandle = < 0x10 >;
    			group1 {
    				psels = < 0x10021 >;
    				bias-pull-up;
    			};
    			group2 {
    				psels = < 0x22 >;
    			};
    		};
    		uart1_sleep: uart1_sleep {
    			phandle = < 0x11 >;
    			group1 {
    				psels = < 0x10021 >, < 0x22 >;
    				low-power-enable;
    			};
    		};
    		i2c0_default: i2c0_default {
    			phandle = < 0x4 >;
    			group1 {
    				psels = < 0xc001a >, < 0xb001b >;
    			};
    		};
    		i2c0_sleep: i2c0_sleep {
    			phandle = < 0x5 >;
    			group1 {
    				psels = < 0xc001a >, < 0xb001b >;
    				low-power-enable;
    			};
    		};
    		i2c1_default: i2c1_default {
    			phandle = < 0x8 >;
    			group1 {
    				psels = < 0xc001e >, < 0xb001f >;
    			};
    		};
    		i2c1_sleep: i2c1_sleep {
    			phandle = < 0x9 >;
    			group1 {
    				psels = < 0xc001e >, < 0xb001f >;
    				low-power-enable;
    			};
    		};
    		pwm0_default: pwm0_default {
    			phandle = < 0xc >;
    			group1 {
    				psels = < 0x16000d >;
    				nordic,invert;
    			};
    		};
    		pwm0_sleep: pwm0_sleep {
    			phandle = < 0xd >;
    			group1 {
    				psels = < 0x16000d >;
    				low-power-enable;
    			};
    		};
    		spi0_default: spi0_default {
    			phandle = < 0x6 >;
    			group1 {
    				psels = < 0x4001b >, < 0x5001a >, < 0x6001d >;
    			};
    		};
    		spi0_sleep: spi0_sleep {
    			phandle = < 0x7 >;
    			group1 {
    				psels = < 0x4001b >, < 0x5001a >, < 0x6001d >;
    				low-power-enable;
    			};
    		};
    		spi1_default: spi1_default {
    			phandle = < 0xa >;
    			group1 {
    				psels = < 0x4001f >, < 0x5001e >, < 0x60028 >;
    			};
    		};
    		spi1_sleep: spi1_sleep {
    			phandle = < 0xb >;
    			group1 {
    				psels = < 0x4001f >, < 0x5001e >, < 0x60028 >;
    				low-power-enable;
    			};
    		};
    		spi2_default: spi2_default {
    			phandle = < 0xe >;
    			group1 {
    				psels = < 0x40013 >, < 0x50014 >, < 0x60015 >;
    			};
    		};
    		spi2_sleep: spi2_sleep {
    			phandle = < 0xf >;
    			group1 {
    				psels = < 0x40013 >, < 0x50014 >, < 0x60015 >;
    				low-power-enable;
    			};
    		};
    		qspi_default: qspi_default {
    			phandle = < 0x12 >;
    			group1 {
    				psels = < 0x1d0013 >, < 0x1f0014 >, < 0x200015 >, < 0x210016 >, < 0x220017 >, < 0x1e0011 >;
    				nordic,drive-mode = < 0x3 >;
    			};
    		};
    		qspi_sleep: qspi_sleep {
    			phandle = < 0x13 >;
    			group1 {
    				psels = < 0x1d0013 >, < 0x1f0014 >, < 0x200015 >, < 0x210016 >, < 0x220017 >;
    				low-power-enable;
    			};
    			group2 {
    				psels = < 0x1e0011 >;
    				low-power-enable;
    				bias-pull-up;
    			};
    		};
    		spi3_default: spi3_default {
    			phandle = < 0x15 >;
    			group1 {
    				psels = < 0x4002f >, < 0x6002e >, < 0x5002d >;
    			};
    		};
    		spi3_sleep: spi3_sleep {
    			phandle = < 0x16 >;
    			group1 {
    				psels = < 0x4002f >, < 0x6002e >, < 0x5002d >;
    				low-power-enable;
    			};
    		};
    	};
    	rng_hci: entropy_bt_hci {
    		compatible = "zephyr,bt-hci-entropy";
    		status = "okay";
    	};
    	cpus {
    		#address-cells = < 0x1 >;
    		#size-cells = < 0x0 >;
    		cpu@0 {
    			device_type = "cpu";
    			compatible = "arm,cortex-m4f";
    			reg = < 0x0 >;
    			#address-cells = < 0x1 >;
    			#size-cells = < 0x1 >;
    			itm: itm@e0000000 {
    				compatible = "arm,armv7m-itm";
    				reg = < 0xe0000000 0x1000 >;
    				swo-ref-frequency = < 0x1e84800 >;
    			};
    		};
    	};
    	sw_pwm: sw-pwm {
    		compatible = "nordic,nrf-sw-pwm";
    		status = "disabled";
    		generator = < &timer2 >;
    		clock-prescaler = < 0x0 >;
    		#pwm-cells = < 0x3 >;
    	};
    	leds {
    		compatible = "gpio-leds";
    		led0: led_0 {
    			gpios = < &gpio0 0xd 0x1 >;
    			label = "Green LED 0";
    		};
    		led1: led_1 {
    			gpios = < &gpio0 0xe 0x1 >;
    			label = "Green LED 1";
    		};
    		led2: led_2 {
    			gpios = < &gpio0 0xf 0x1 >;
    			label = "Green LED 2";
    		};
    		led3: led_3 {
    			gpios = < &gpio0 0x10 0x1 >;
    			label = "Green LED 3";
    		};
    	};
    	pwmleds {
    		compatible = "pwm-leds";
    		pwm_led0: pwm_led_0 {
    			pwms = < &pwm0 0x0 0x1312d00 0x1 >;
    		};
    	};
    	buttons {
    		compatible = "gpio-keys";
    		button0: button_0 {
    			gpios = < &gpio0 0xb 0x11 >;
    			label = "Push button switch 0";
    		};
    		button1: button_1 {
    			gpios = < &gpio0 0xc 0x11 >;
    			label = "Push button switch 1";
    		};
    		button2: button_2 {
    			gpios = < &gpio0 0x18 0x11 >;
    			label = "Push button switch 2";
    		};
    		button3: button_3 {
    			gpios = < &gpio0 0x19 0x11 >;
    			label = "Push button switch 3";
    		};
    	};
    	arduino_header: connector {
    		compatible = "arduino-header-r3";
    		#gpio-cells = < 0x2 >;
    		gpio-map-mask = < 0xffffffff 0xffffffc0 >;
    		gpio-map-pass-thru = < 0x0 0x3f >;
    		gpio-map = < 0x0 0x0 &gpio0 0x3 0x0 >, < 0x1 0x0 &gpio0 0x4 0x0 >, < 0x2 0x0 &gpio0 0x1c 0x0 >, < 0x3 0x0 &gpio0 0x1d 0x0 >, < 0x4 0x0 &gpio0 0x1e 0x0 >, < 0x5 0x0 &gpio0 0x1f 0x0 >, < 0x6 0x0 &gpio1 0x1 0x0 >, < 0x7 0x0 &gpio1 0x2 0x0 >, < 0x8 0x0 &gpio1 0x3 0x0 >, < 0x9 0x0 &gpio1 0x4 0x0 >, < 0xa 0x0 &gpio1 0x5 0x0 >, < 0xb 0x0 &gpio1 0x6 0x0 >, < 0xc 0x0 &gpio1 0x7 0x0 >, < 0xd 0x0 &gpio1 0x8 0x0 >, < 0xe 0x0 &gpio1 0xa 0x0 >, < 0xf 0x0 &gpio1 0xb 0x0 >, < 0x10 0x0 &gpio1 0xc 0x0 >, < 0x11 0x0 &gpio1 0xd 0x0 >, < 0x12 0x0 &gpio1 0xe 0x0 >, < 0x13 0x0 &gpio1 0xf 0x0 >, < 0x14 0x0 &gpio0 0x1a 0x0 >, < 0x15 0x0 &gpio0 0x1b 0x0 >;
    		phandle = < 0x14 >;
    	};
    	arduino_adc: analog-connector {
    		compatible = "arduino,uno-adc";
    		#io-channel-cells = < 0x1 >;
    		io-channel-map = < 0x0 &adc 0x1 >, < 0x1 &adc 0x2 >, < 0x2 &adc 0x4 >, < 0x3 &adc 0x5 >, < 0x4 &adc 0x6 >, < 0x5 &adc 0x7 >;
    	};
    };
    

    Full /mcuboot/zephyr/zephyr.dts file.

  • Hello again,

    This is the full sample file just in case.

    Regards,
    Abdullah Al Abri

    6813.smp_svr.rar

  • Hello,

    It should work if you move the 'boards' directory from /child_image/boards to /child_image/mcuboot/boards. The overlay will then be applied to the mcuboot build (remember to do a pristine build to ensure the build system detects this change)

    https://developer.nordicsemi.com/nRF_Connect_SDK/doc/latest/nrf/config_and_build/multi_image.html#permanent-configuration-changes-to-child-images

    Best regards,

    Vidar

  • Hello,

    Thank you very much for the help. It worked, I moved the overlay file according to what you said. I have tried too put child image configuration file in /child_image/mcuboot/ folder but it didn't work at first, then I moved it file to /child_image/ folder and it worked.

    Regards,
    Abdullah Al Abri

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