PAN #9 in the nRF51822-PAN-v2.4 document provides a workaround for non-functional OUTINIT. This question and this one improve the workaround and state it's unnecessary in V3 chips. Indeed, PAN #9 is not listed in nRF51822-PAN-v3.0.
However, I've observed that with the GPIOTE disabled and the GPIO cleared, configuring an nRF51822 with OUTINIT_Low and POLARITY_LoToHi does sometimes produce a sub-microsecond assertion of the corresponding GPIO exactly coincident with the assignment to the GPIOTE CONFIG register. My suspicion is that the OUTINIT works in V3, but maybe not quite quickly enough.
Applying the PAN #9 workaround appears to eliminate the glitch.