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nRF5 SDK 17 SPIS example is not capturing all transfers from Master

I am running the subject SPIS example software on a nRF52DK, pca10040, board, as the SPI Slave. The Master is capturing CAN bus messages, 8 bytes per message, and sending them to the slave, along with 2 to 4 additional bytes of information, for output on the serial monitor. The Slave correctly captures and outputs, to the serial monitor, the received transfers from the master for all single frame and first frame messages but only periodically outputs consecutive frame messages. Although the Master makes no use of the messages from the slave, the slave sends out the default "Nordic" message for each completed transfer from the master. A logic analyzer output (snapshot below) shows that all the master messages are being sent to the slave on the MOSI line (second row), but the slave messages on the MISO line (forth row) only appear for the messages that get sent to the serial monitor. The consecutive frames that don't have an associated a slave message do not get sent to the serial monitor. I suspect that this is a problem with the Semaphore Acquire and Release programming, but I can't find the associated code in the example problem. I currently have the master clock rate set as low as it will go at 158 kHz. The attached logic analyzer snapshot shows a first frame message, at the far left, followed by two consecutive frames. The MISO messages are the yellow columns at the bottom. It can be seen that only every eighth consecutive frame has an associated slave message, which are the ones that get sent to the serial monitor. The chip select events are shown at the top and it can be seen that a start and end signal is present for every byte sent by the master. My question is, where can I find the code, in the SPIS example, that detects the start and end events and what parameters should I look at that might be causing this behavior?

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