NVIC changing interrupt priority

Question

Hello Nordic 
 I am running into a problem where I am trying to change the interrupt priority of the the RADIO_IRQ using a proprietary radio protocol on the nRF51 rev3. I am not using a softdevice from Nordic and I am not using BLE for this application. 
 I have a situation where I need the radio IRQ to run on priority 0 and later on I want it on priority 2. This works fine most of the time but on a rare occasion the priority is somehow not changed to 2 from 0. In my code this ends op resulting in a hardfault because a SVC is used on priority 0. 
 From the ARM Information Center Application Note 321 I found the following: 
 
 "On ARMv6-M processors, you should
only change the priority level of an
interrupt when the interrupt is
disabled, otherwise the result is
unpredictable." 
 "On Cortex-M0 and Cortex-M0+
processors, dynamic changing of
priority on enabled interrupts or
exceptions is not supported." 
 "For the Cortex-M0 and the Cortex-M0+
processors, the interrupt should be
disabled at the NVIC when changing
priority level. The BASEPRI register
is not available in these two
processors." 
 
 What I understand from this is that the interrupt priority may only be changed when the IRQ is disabled. So I disable the RADIO_IRQ before changing the priority and enabling the IRQ again. This didn't prevent the code from failing. So tried entering __DSB() instructions around the priority changing. This also didn't prevent the code from failing. 
 /* set NVIC */
NVIC_DisableIRQ( RADIO_IRQn );
/* make sure IRQ is disabled */
__DSB();
NVIC_SetPriority( RADIO_IRQn, 2 );
/* make sure priority is changed */
__DSB();
NVIC_EnableIRQ( RADIO_IRQn );
 
 Now I am starting to wonder if I misinterpreted the ARM application note and that the IRQ should not be changed once enabled at all. 
 Now my question is if Nordic has any experience with changing the priority interrupt of a IRQ and if its possible how it should be done.

Rinze · Accepted Answer

It seems I have found the problem. When a interrupt priority is changed within that interrupt this will still effect the rule that a SVC cannot be called from the same interrupt. It doesn't matter on what priority the interrupt is called but what the priority of the IRQ is at the moment that the SVC is called from that IRQ. 
 I do still wonder if a __DSB() and __ISB() are required when setting the priority.