BT840X Low Transmit Power with Skyworks FEM

Hello,

I have read through many threads and am trying to understand how the Skyworks fem module works as there is not a good example.  I will start by saying that I am seeing more power with the FEM but it is now what was expected. This is all being used for BLE.

Currently I have 2 boards and several different advertising sets and one has the module with the skyworks FEM.  When I set both to 8db using set_tx_power(BT_HCI_VS_LL_HANDLE_TYPE_ADV, 2, 8); I am not seeing the same rssi.  The unit with the FEM is about 6-10 DB low so I am going to say something is being left on the table for link budget.  I would expect to see the same RSSI when using the same antenna and not moving it.  I can see the the spike on the power profiler is about the same as well which is why it is a bit confusing.

Device Tree:

    nrf_radio_fem: skyFem {
        compatible = "skyworks,sky66112-11", "generic-fem-two-ctrl-pins";
        ctx-gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
        crx-gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
        cps-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
        chl-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
        };

&radio {
    fem = <&nrf_radio_fem>;
    };
Init code
gpio_pin_configure_dt(&CHL, GPIO_OUTPUT | GPIO_OUTPUT_INIT_HIGH);
		gpio_pin_configure_dt(&CPS, GPIO_OUTPUT | GPIO_OUTPUT_INIT_LOW);

		// mpsl_fem_gain_t fem = {.gain_db=22};
		// int ret = mpsl_fem_pa_gain_set(&fem);
		// if(ret != 0)
		// {
		// 	LOG_ERR("FEM");
		// }

		tx_power = 22;
		set_tx_power(BT_HCI_VS_LL_HANDLE_TYPE_ADV, 0, tx_power);
		set_tx_power(BT_HCI_VS_LL_HANDLE_TYPE_ADV, 1, tx_power);
		set_tx_power(BT_HCI_VS_LL_HANDLE_TYPE_ADV, 2, 8);
		set_tx_power(BT_HCI_VS_LL_HANDLE_TYPE_ADV, 3, 8);
Config
CONFIG_MPSL=y
CONFIG_MPSL_FEM=y
CONFIG_MPSL_FEM_SIMPLE_GPIO=y
CONFIG_BT_CTLR_TX_PWR_ANTENNA=22
Parents Reply Children
  • If the other pins are not controlled by the gpio and are set to default float then the behavior of the default value SKYWorks FEM is unpredictable. 

  • If you review the post you will see that they are set in software.  What I am stating is that your gain settings for the driver are incorrect.  I expect a setting of 8db to have the same rssi with clear line of sight with or without a FEM.

  • Hi, 

    Same for me. I could not get it to work.

     If you see the nrf52840dk_nrf52840.dts, in the included file nrf52840dk_nrf52840-pinctrl.dtsi
    uart0_default: uart0_default {
        group1 {
                psels = <NRF_PSEL(UART_TX, 0, 6)>,
                <NRF_PSEL(UART_RTS, 0, 5)>;
            };
        group2 {
                psels = <NRF_PSEL(UART_RX, 0, 8)>,
                <NRF_PSEL(UART_CTS, 0, 7)>;
                bias-pull-up;
            };
    };
    
    uart0_sleep: uart0_sleep {
        group1 {
                psels = <NRF_PSEL(UART_TX, 0, 6)>,
                        <NRF_PSEL(UART_RX, 0, 8)>,
                        <NRF_PSEL(UART_RTS, 0, 5)>,
                        <NRF_PSEL(UART_CTS, 0, 7)>;
                low-power-enable;
        };
    };
    The uart0 uses pins P0.6 and P0.8 as TX and RX.
    Does the new definitions in the device tree override the pin functions?
  • OK, it looks like something is clearly wrong then if it is more than one who is seeing the same thing. I will try to find Skyworkorks FEM Module or order it to test this myself. 

  • Hello Susheel,

    It would be a great help for developers.
    Unfortunately the documentation is a bit confusing.
    I'm using a Fanstel EV-BT40X board (nRF52840 + SKY66112).

    I was able to make the example ble_app_uart_c work successfully with the Softdevice S140, using the control codes from Fanstel (https://www.fanstel.com/s/BT840X_SKY66112-Codes.zip), but not for Zephyr with NCS 2.5.0.

    // BT840X SKY66112 FEM ble_app_uart_c example
    // main.c
    ...
    #include "pa_lna.h"
    
    #define APP_PA_LAN
    
    #ifdef APP_PA_LAN
    #define APP_PA_PIN      17      // CTX pin
    #define APP_LNA_PIN     19      // CRX pin
    #define APP_CHL_PIN		8       // CHL pin (0: TX low pwer, 1: TX high power)
    #define APP_CPS_PIN		6       // CPS pin (0: LNA/PA On, 1: Bypass)
    #endif
    ...
    
    int main(void)
    {
    ...
    #ifdef APP_PA_LAN
    	nrf_gpio_cfg_output(APP_CPS_PIN);
    	nrf_gpio_cfg_output(APP_CHL_PIN);
    	nrf_gpio_pin_clear(APP_CPS_PIN);    // LNA/PA On
    	nrf_gpio_pin_set(APP_CHL_PIN);      // TX High Power
    	pa_lna_init(APP_PA_PIN,APP_LNA_PIN);    
    #endif
    ...
    }

    Please let us know any news.

    Thank you.

    Pablo

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