Configuring nRF91 UART for SDI-12

Hi,

I’m working on a project trying to implement SDI-12 communication between a sensor an nRF91 board (specifically Circuit Dojo's nRF9160 Feather). I am facing an issue configuring the UART data bits for the SDI-12 comms. My setup involves UART2, configured for 1200 baud rate, even parity, and 1 stop bit (using Zephyr’s uart api for config).

I’ve done so far:

  1. Checked the .dts file for UART2 settings, specifically setting current-speed for 1200 baud.
  2. In prj.conf, enabled wide data, pipe UART, runtime configuration, and asynchronous UART API.
  3. When setting uart_cfg.data_bits to UART_CFG_DATA_BITS_7, I receive an error -134 (ENOSYS)

I am able to configure everything else at runtime:

  uart_cfg.baudrate = 1200;
  uart_cfg.parity = UART_CFG_PARITY_EVEN;
  uart_cfg.stop_bits = UART_CFG_STOP_BITS_1;
  // uart_cfg.data_bits = UART_CFG_DATA_BITS_7; // does not work
  uart_cfg.flow_ctrl = UART_CFG_FLOW_CTRL_NONE;

Before changing the configuration format, the device was successfully talking with another nRF91 board, I simply need to change the data format to use 7 data bits.

I tried different data bit settings (1 to 9), but all return the same error. Also, the initial UART configure shows: Initial UART config: Baudrate: 1200, Parity: 0, Stop bits: 1, Data bits: 3, Flow control: 0. [3 data bits which seems unconventional].

Any ideas to change the number of data bits transmitted would be greatly appreciated!

Cheers,
Callum

Parents
  • Hello,

    Sorry, but the hardware only support fixed 8bit data. I guess it could potentially be possible to disable stop bit, and instead the 8th bit in the data was allways set to '0', that would give the same result as 7bit + 1 stop bit (stop is allways 0).

    Update: Please see my next reply that the 8th bit should be parity bit, not stop bit. So don't disable stop bit, but do disable parity bit, and instead calculate the 8th bit as parity.

    Kenneth

Reply
  • Hello,

    Sorry, but the hardware only support fixed 8bit data. I guess it could potentially be possible to disable stop bit, and instead the 8th bit in the data was allways set to '0', that would give the same result as 7bit + 1 stop bit (stop is allways 0).

    Update: Please see my next reply that the 8th bit should be parity bit, not stop bit. So don't disable stop bit, but do disable parity bit, and instead calculate the 8th bit as parity.

    Kenneth

Children
Related