ADC REFSEL VGB Behavior

[nate]

Chip: NRF51822

Per the documentation the band gap voltage is 1.2V however on my board when I apply the voltage 1.5V to AIN2 i read the following value from the ADC: 209

This would imply that the total voltage that can be measured is ~1.8V

Is this expected? Shouldn't only report 255 for any value above 1.2V?

The following is my ADC config:

NRF_ADC->CONFIG	= 	  (ADC_CONFIG_EXTREFSEL_None << ADC_CONFIG_EXTREFSEL_Pos) 						
					| (ADC_CONFIG_PSEL_AnalogInput2 << ADC_CONFIG_PSEL_Pos)							/*!< Use analog input 2 as analog input. */
					| (ADC_CONFIG_REFSEL_VBG << ADC_CONFIG_REFSEL_Pos)								/*!< Use internal 1.2V (really 1.8V?) bandgap voltage as reference for conversion. */
					| (ADC_CONFIG_INPSEL_AnalogInputNoPrescaling << ADC_CONFIG_INPSEL_Pos) 			/*!< Analog input specified by PSEL with no prescaling used as input for the conversion. */
					| (ADC_CONFIG_RES_8bit << ADC_CONFIG_RES_Pos);									/*!< 8 bit ADC resolution. */

[Stefan Birnir Sverrisson]

Hi

Do you have a voltage divider connected to the ADC input pin? What is the impedance of your ADC input source. The ADC is highly sensitive to the impedance of the input source. Look at this thread in order to realize what you can do in order to correct the error.

[Bastiaan]

The voltage divider circuit has a very high impedance, I will alert my HW dev to this issue. Thank you for the feedback.

[Guest]

The voltage divider circuit has a very high impedance, I will alert my HW dev to this issue. Thank you for the feedback.

[nate]

Per the link you added Stefan the following comment was made: "the other hand, when applying voltage source to the ADC input pin with high impedance, additional gain and offset error is introduced which is different for different prescalers. Choosing high impedance voltage divider is on the other hand desirable to prevent high leakage current though the voltage divider. "

Is there an equation you have access to that can help me determine what the offset and gain will be based off introduced impedance from my circuit?

[Stefan Birnir Sverrisson]

Hi Nate

We do not have this calculation in any document yet but you could perform them yourself if you desire by looking at ADC model which is revealed in my response in this thread: http://devzone.nordicsemi.com/index.php/analog-prescale-question

There is also a document there attached that shows the value of the internal ADC resistor which depends on the prescale configuration of the ADC.

What happens when a high impedance input source is present (e.g. voltage divider) is as follows. When not sampling, the R_AIN (referring to ADC model figure in the above thread) value will have very high value and you can consider it to be an open circuit. The moment you are sampling, R_AIN is 120k-400k and therefore lowers the ADC input voltage when a voltage divider is connected, which produces the gain and offset error.

We are currently working on making a white paper for the ADC and hopefully the equations you are asking for will be in that white paper. I am not sure when the white paper will be released, but lets give it a few weeks.