How to configure the NCS sample to support nRF52840 QFAA QFN48

Dear Support Team

We use the nRF52840 QFAA QFN48 and the reference circuitry as the screenshot below for our board, but the board could not run after we programmed the hello_world or peripheral_uart sample into the chip.

We found that the sample was configured for the nRF52840  QIAA by default after we selected the board of nrf52840dk_nrf52840 on the Add Build Configuration like the screenshot below.

And we also found that VDD and VDDH are shortcircuited inside the package. Therefore the device is only usable in Normal Voltage supply mode, and not High Voltage supply mode., but the default configuration has the CONFIG_BOARD_ENABLE_DCDC_HV=y and the CONFIG_SOC_DCDC_NRF52X_HV=y in the .conf file like the screenshot below. We were not sure this is the reason of the chip could not run normal.

Is there anything specific configuration for the nRF52840 QFAA QFN48 in these samples?  Many thanks.

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  • Hi Tom,

    We found that the sample was configured for the nRF52840  QIAA by default after we selected the board of nrf52840dk_nrf52840 on the Add Build Configuration like the screenshot below.

    This does not have a great impact on the firmware complication itself. QIAA and QFAA has the same amount of peripherals etc, but the QFN48 package has less features routed due to the package being smaller/less pins are routed.

    but the default configuration has the CONFIG_BOARD_ENABLE_DCDC_HV=y and the CONFIG_SOC_DCDC_NRF52X_HV=y in the .conf file like the screenshot below. We were not sure this is the reason of the chip could not run normal.

    You should explicitly set CONFIG_BOARD_ENABLE_DCDC_HV=n when using this design.

     

    Do you have an external 32k LFCLK? If not, you should also set this:

    CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y

     Kind regards,

    Håkon

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  • Hi Tom,

    We found that the sample was configured for the nRF52840  QIAA by default after we selected the board of nrf52840dk_nrf52840 on the Add Build Configuration like the screenshot below.

    This does not have a great impact on the firmware complication itself. QIAA and QFAA has the same amount of peripherals etc, but the QFN48 package has less features routed due to the package being smaller/less pins are routed.

    but the default configuration has the CONFIG_BOARD_ENABLE_DCDC_HV=y and the CONFIG_SOC_DCDC_NRF52X_HV=y in the .conf file like the screenshot below. We were not sure this is the reason of the chip could not run normal.

    You should explicitly set CONFIG_BOARD_ENABLE_DCDC_HV=n when using this design.

     

    Do you have an external 32k LFCLK? If not, you should also set this:

    CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y

     Kind regards,

    Håkon

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