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DTS files for a custom board NRF5340 + NRF21540

msfassarella

Hi guys, 

I've done a custom board with NRF5340 + NRF21540 and I'm not sure the right way to link the cpuapp and cpunet for control the output power of NRF21540. 

I tried to following the documentation https://developer.nordicsemi.com/nRF_Connect_SDK/doc/2.1.0-rc2/zephyr/build/dts/api/bindings/gpio/nordic%2Cnrf-gpio-forwarder.html

The nrf5340_cpuapp_common.dts is like.

/*
 * Copyright (c) 2019-2020 Nordic Semiconductor ASA
 *
 * SPDX-License-Identifier: Apache-2.0
 * MODIFICADO
 */
#include "nrf5340_cpuapp_common-pinctrl.dtsi"

/ {

	chosen {
		zephyr,console = &uart0;
		zephyr,shell-uart = &uart0;
		zephyr,uart-mcumgr = &uart0;
		zephyr,bt-mon-uart = &uart0;
		zephyr,bt-c2h-uart = &uart0;
		zephyr,bt-hci-rpmsg-ipc = &ipc0;
		nordic,802154-spinel-ipc = &ipc0;
		zephyr,ieee802154 = &ieee802154;
	};

	leds {
		compatible = "gpio-leds";
		led0: led_0 {
			gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
			label = "Green LED 0";
		};
		led1: led_1 {
			gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
			label = "Green LED 1";
		};
	};

	buttons { 
		compatible = "gpio-keys";
		button0: button_0 {
			gpios = <&gpio0 27 (GPIO_ACTIVE_LOW)>;
			label = "Push button 0";
		};
	};

	nrf_radio_fem: nrf21540 {
		compatible = "nordic,nrf21540-fem";
		tx-en-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
		rx-en-gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
		pdn-gpios   = <&gpio0 26 GPIO_ACTIVE_HIGH>;
		mode-gpios  = <&gpio1 14 GPIO_ACTIVE_HIGH>;
		ant-sel-gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
	  };

	  gpio_fwd: nrf-gpio-forwarder {
		compatible = "nordic,nrf-gpio-forwarder";
		nrf21540-gpio-if {
		  gpios = <&gpio1 13 0>, <&gpio0 30 0>, <&gpio0 26 0>, <&gpio1 14 0>, <&gpio0 31 0> ;
		};
	  };

	/* These aliases are provided for compatibility with samples */
	aliases {
		led0 = &led0;
		led1 = &led1;
		sw0 = &button0;
		bootloader-led0 = &led0;
		mcuboot-button0 = &button0;
		mcuboot-led0 = &led0;
		watchdog0 = &wdt0;
		spi-flash0 = &is25lp;
	};
};

&adc {
	status = "okay";
};

&gpiote {
	status = "okay";
};

&gpio0 {
	status = "okay";
};

&gpio1 {
	status = "okay";
};

&uart0 {
	status = "okay";
	current-speed = <115200>;
	pinctrl-0 = <&uart0_default>;
	pinctrl-1 = <&uart0_sleep>;
	pinctrl-names = "default", "sleep";
};

&uart1 {
	status = "okay";
	current-speed = <115200>;
	pinctrl-0 = <&uart1_default>;
	pinctrl-1 = <&uart1_sleep>;
	pinctrl-names = "default", "sleep";
};


&timer0 {
	status = "okay";
};

&timer1 {
	status = "okay";
};

&timer2 {
	status = "okay";
};


&flash0 {

	partitions {
		compatible = "fixed-partitions";
		#address-cells = <1>;
		#size-cells = <1>;

		boot_partition: partition@0 {
			label = "mcuboot";
			reg = <0x00000000 0x00010000>;
		};
		slot0_partition: partition@10000 {
			label = "image-0";
		};
		slot0_ns_partition: partition@50000 {
			label = "image-0-nonsecure";
		};
		slot1_partition: partition@80000 {
			label = "image-1";
		};
		slot1_ns_partition: partition@c0000 {
			label = "image-1-nonsecure";
		};
		scratch_partition: partition@f0000 {
			label = "image-scratch";
			reg = <0x000f0000 0xa000>;
		};
		storage_partition: partition@fa000 {
			label = "storage";
			reg = <0x000fa000 0x00006000>;
		};
	};
};

&ieee802154 {
	status = "okay";
};

zephyr_udc0: &usbd {
 	compatible = "nordic,nrf-usbd";
 	status = "okay";
};

/ {

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		sram0_image: image@20000000 {
			/* Zephyr image(s) memory */
		};

		sram0_s: image_s@20000000 {
			/* Secure image memory */
		};

		sram0_ns: image_ns@20040000 {
			/* Non-Secure image memory */
		};
	};
};

/* Include partition configuration file */
#include "nrf5340_cpuapp_partition_conf.dts"

In nrf5340_myboard_cpunet.dts 

/*
 * Copyright (c) 2020 Nordic Semiconductor ASA
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/dts-v1/;
#include <nordic/nrf5340_cpunet_qkaa.dtsi>
#include "nrf5340_dsboxv5_cpunet-pinctrl.dtsi"

/ {
	model = "Nordic NRF5340 DSBOXV5 Network";
	compatible = "nordic,nrf5340-dsboxv5-cpunet";

	chosen {
		zephyr,console = &uart0;
		zephyr,shell-uart = &uart0;
		zephyr,uart-mcumgr = &uart0;
		zephyr,bt-mon-uart = &uart0;
		zephyr,bt-c2h-uart = &uart0;
		zephyr,bt-hci-rpmsg-ipc = &ipc0;
		nordic,802154-spinel-ipc = &ipc0;
		zephyr,sram = &sram1;
		zephyr,flash = &flash1;
		zephyr,code-partition = &slot0_partition;
		zephyr,ieee802154 = &ieee802154;
	};

	nrf_radio_fem: nrf21540_fem {
		compatible = "nordic,nrf21540-fem";
		tx-en-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
		rx-en-gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
		pdn-gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
		mode-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
		ant-sel-gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;

		spi-if = <&nrf_radio_fem_spi>;
		supply-voltage-mv = <3300>;
	};

	/* These aliases are provided for compatibility with samples */
	aliases {
		watchdog0 = &wdt0;
	};
};


&gpiote {
	status = "okay";
};

&gpio0 {
	status = "okay";
};

&gpio1 {
	status = "okay";
};

&uart0 {
	status = "okay";
	current-speed = <115200>;
	pinctrl-0 = <&uart0_default>;
	pinctrl-1 = <&uart0_sleep>;
	pinctrl-names = "default", "sleep";
};

fem_spi: &spi0 {
	status = "okay";
	cs-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;

	pinctrl-0 = <&spi0_default>;
	pinctrl-1 = <&spi0_sleep>;
	pinctrl-names = "default", "sleep";
	nrf_radio_fem_spi: nrf21540_fem_spi@0 {
		compatible = "nordic,nrf21540-fem-spi";
		status = "okay";
		reg = <0>;
		spi-max-frequency = <8000000>;
	};
};

&radio {
	fem = <&nrf_radio_fem>;
};

&timer0 {
	status = "okay";
};

&timer1 {
	status = "okay";
};

&timer2 {
	status = "okay";
};

&flash1 {

	partitions {
		compatible = "fixed-partitions";
		#address-cells = <1>;
		#size-cells = <1>;

		boot_partition: partition@0 {
			label = "mcuboot";
			reg = <0x00000000 0xc000>;
		};
		slot0_partition: partition@c000 {
			label = "image-0";
			reg = <0x0000C000 0x12000>;
		};
		slot1_partition: partition@1e000 {
			label = "image-1";
			reg = <0x0001E000 0x12000>;
		};
		scratch_partition: partition@30000 {
			label = "image-scratch";
			reg = <0x00030000 0xa000>;
		};
		storage_partition: partition@3a000 {
			label = "storage";
			reg = <0x0003a000 0x6000>;
		};
	};
};

&ieee802154 {
	status = "okay";
};

/* Include shared RAM configuration file */
#include "nrf5340_shared_sram_planning_conf.dts"

The proj.conf is 

##LOGs
CONFIG_LOG=y
CONFIG_CONSOLE=y
CONFIG_PRINTK=y
CONFIG_STDOUT_CONSOLE=y
CONFIG_LOG_BACKEND_RTT=y
CONFIG_RTT_CONSOLE=y
CONFIG_USE_SEGGER_RTT=y
CONFIG_UART_CONSOLE=n

## Settings
CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=4196
CONFIG_MAIN_STACK_SIZE=10240
CONFIG_REBOOT=y

## Log
CONFIG_LOG_PRINTK=y
CONFIG_LOG_DEFAULT_LEVEL=3
# CONFIG_LOG_BACKEND_UART=y

CONFIG_GPIO=y

# ENABLE SERIAL DRIVER
CONFIG_SERIAL=y

CONFIG_UART_ASYNC_API=y

CONFIG_BT=y
CONFIG_BT_DEBUG_LOG=n
CONFIG_BT_SMP=y
CONFIG_BT_PERIPHERAL=y
CONFIG_BT_CENTRAL=y
CONFIG_BT_GATT_CLIENT=y
CONFIG_BT_PRIVACY=n
CONFIG_BT_DEVICE_NAME="GTW-V5"

CONFIG_BT_DIS=y
CONFIG_BT_DIS_PNP=n
CONFIG_BT_BAS=y
CONFIG_BT_HRS=y
# CONFIG_BT_DEVICE_APPEARANCE=833

# CONFIG_FEM_AL_LIB=y
# CONFIG_BOARD_ENABLE_CPUNET=y
# CONFIG_MBOX=y


# Allow for large Bluetooth data packets.
CONFIG_BT_L2CAP_TX_MTU=498
CONFIG_BT_BUF_ACL_RX_SIZE=502
CONFIG_BT_BUF_ACL_TX_SIZE=502


CONFIG_FLASH=y
CONFIG_SPI=y
CONFIG_FLASH_JESD216_API=y
# CONFIG_DT_HAS_JEDEC_SPI_NOR_ENABLED=y
CONFIG_SPI_NOR=y

CONFIG_ENTROPY_GENERATOR=y


CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=4096

Are these files properly configured? 

In the application, how can I set a specific output power using the spi channel? 

My problem is that I couldn't change the output power.

Parents
  • 0

    Hello,

    The easiest may be to look at the added overlay files when including the nrf21540ek shield:
    https://github.com/nrfconnect/sdk-nrf/tree/main/boards/shields/nrf21540ek

    When building for instance the peripheral uart with the nrf21540ek you simply follow:
    https://developer.nordicsemi.com/nRF_Connect_SDK/doc/latest/nrf/samples/bluetooth/peripheral_uart/README.html#fem-support 

    If you want to observe what is actually added during build you can checkout dts and kconfig in:
    appcore: \build\peripheral_uart\zephyr\zephyr.dts (\build\peripheral_uart\zephyr\.config)
    netcore: \build\hci_ipc\zephyr\zephyr.dts  (\build\hci_ipc\zephyr\.config)

    Alternatively here is how to add the nrf21540ek shield for a generic nRF5340 example:
    https://developer.nordicsemi.com/nRF_Connect_SDK/doc/latest/nrf/device_guides/working_with_fem.html#programming 

    This example show how to set CONFIG_BT_CTLR_TX_PWR_DYNAMIC_CONTROL to control output power dynamically:
    https://developer.nordicsemi.com/nRF_Connect_SDK/doc/latest/zephyr/samples/bluetooth/hci_pwr_ctrl/README.html 

    Best regards,
    Kenneth

  • 0 in reply to Kenneth

    Hi Kenneth. 

    First of all, thanks for your reply. 

    In these days I was trying to confirm the hardware design and for this purpose the NRF21540 GPIOs were manually controlled. I confirmed that the hardware design is working and the RF power control by the Mode pin is ok too.

    I tried configure CPU Net like described above and stopped the manual control over it (ant-sel-gpios and spi-if  were removed)

    Inside the \build\hci_rpmsg\zephyr\zephyr.dts I found the following references to FEM

    	radio: radio@41008000 {
			compatible = "nordic,nrf-radio";
			reg = < 0x41008000 0x1000 >;
			interrupts = < 0x8 0x5 >;
			status = "okay";
			dfe-supported;
			ieee802154-supported;
			ble-2mbps-supported;
			ble-coded-phy-supported;
			fem = < &nrf_radio_fem >;
			ieee802154: ieee802154 {
				compatible = "nordic,nrf-ieee802154";
				status = "okay";
			};
		};

    and 

    	nrf_radio_fem: nrf21540_fem {
		compatible = "nordic,nrf21540-fem";
		tx-en-gpios = < &gpio1 0xd 0x0 >;
		rx-en-gpios = < &gpio0 0x1e 0x0 >;
		pdn-gpios = < &gpio0 0x1a 0x0 >;
		mode-gpios = < &gpio1 0xe 0x0 >;
		supply-voltage-mv = < 0xce4 >;
		phandle = < 0x2 >;
	};

    the \build\hci_rpmsg\zephyr\.config has the following 

    # CONFIG_SHELL_BT_NUS is not set
# CONFIG_SHELL_IPC is not set
# CONFIG_MPSL_FEM_ONLY is not set
CONFIG_MPSL_FEM_ANY_SUPPORT=y
CONFIG_MPSL_FEM_NRF21540_GPIO_SUPPORT=y
CONFIG_MPSL_FEM_NCS_SUPPORTED_FEM_USED=y
CONFIG_MPSL_FEM_API_AVAILABLE=y
CONFIG_MPSL_FEM=y
CONFIG_MPSL_FEM_NRF21540_GPIO=y
CONFIG_MPSL_FEM_NRF21540_TX_GAIN_DB=10
CONFIG_MPSL_FEM_NRF21540_TX_GAIN_DB_POUTA=20
CONFIG_MPSL_FEM_NRF21540_TX_GAIN_DB_POUTB=10
CONFIG_MPSL_FEM_NRF21540_RX_GAIN_DB=13
# CONFIG_MPSL_FEM_NRF21540_RUNTIME_PA_GAIN_CONTROL is not set
# CONFIG_MPSL_FEM_POWER_MODEL is not set
CONFIG_MPSL_FEM_DEVICE_CONFIG_254=y
CONFIG_MPSL_THREAD_COOP_PRIO=6
CONFIG_MPSL_WORK_STACK_SIZE=1024
CONFIG_MPSL_TIMESLOT_SESSION_COUNT=0
# CONFIG_MPSL_ASSERT_HANDLER is not set

CONFIG_DT_HAS_NORDIC_NRF21540_FEM_ENABLED=y

    the the \build\zephyr\zephyr.dts has the following

    	gpio_fwd: nrf-gpio-forwarder {
		compatible = "nordic,nrf-gpio-forwarder";
		status = "okay";
		nrf21540-gpio-if {
			gpios = < &gpio1 0xd 0x0 >, < &gpio0 0x1e 0x0 >, < &gpio0 0x1a 0x0 >, < &gpio1 0xe 0x0 >;
		};
	};
     

    I redo the test and both scan and advertisment are working.  

    However, the advertisement has a less rssi power than I expected.

    When I did the same test, but controlling the gpios directly like described in NRF21540 datasheet, the RSSI was bigger. 

    How can I make sure that the NRF21540 is working with 20dB configuration instead of 10dB? 

    How CPU Net choose the value on NRF21540 pin Mode ? 

  • +1 in reply to msfassarella

    I recommend to attach a spectrum analyzer for proper measurements. In general you may not see a difference on the output power with and without nRF21540. Instead you have the possibility to set higher output power than what the nRF5340 alone can support, the library will use the PA gain + nRF output power to get the closest setting that combined give the output power you want.

    But to answer your question, you likely should set CONFIG_MPSL_FEM_NRF21540_TX_GAIN_DB=20. Also you may find this useful:
    https://developer.nordicsemi.com/nRF_Connect_SDK/doc/latest/nrf/device_guides/working_with_fem.html#ug-radio-fem 

    Kenneth

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