nRF5340 conflicting documentation on I2C (aka TWI/TWIM)

[hmolesworth]

The nRF5340 has a special setting for high-drive open-drain I2C/TWI/TWIM: namely E0E1; specifically E0E1 for I2C which only applies to pins P1.02 and P1.03, as E0E1 applies with different meaning for other port pins.

The port CNF description in the product description, presumably for P0, "- 7.13.5.11 PIN_CNF[n] (n=0..31) (Retained)" - is somewhat conflicting on this point: "E0E1 11 Extra high drive '0', extra high drive '1'"). However there is no PIN_CNF[n] (n=0..15) specification for P1. Does open-drain only apply to the pins P1.02 and P1.03? Why is there no P1 specification?

Regarding the nRF5340 DK on the use of these I2C pins:
The I2C/TWI/TWIM pins are not just connected to the user nRF5340 but also to the interface nRF5340; we have no idea what that does and no way to isolate these pins from the interface nRF5340. Does the Interface nRF5340 impact operation on the I2C in any way?

User nRF5340 U1        Interface nRF5340 U2 Arduino Board            On-board Pull-ups        Connectors
====================== ==================== ======================== ======================== =================================
U1 P1.02 AE1 P1.02/I2C U2 P1.02 AE1         via 0R0 R20 to P1.02 SDA R48 4k7 PU via U6 switch P10 pin  9  P4 pin  9  P16 pin 18
U1 P1.03 AF2 P1.03/I2C U2 P1.03 AF2         via 0R0 R24 to P1.03 SCL R49 4k7 PU via U6 switch P10 pin 10  P4 pin 10  P16 pin 20

This query is consequential to ticket issue-with-i2c-communication-in-with-multiple-i2c-sensors raised by frax. Development environment is not a factor.

[Michal]

Does open-drain only apply to the pins P1.02 and P1.03?

Yes. From a note in Pin assignments:

Why is there no P1 specification?

From what I understand the specification is for both ports, but I do agree that at least in this case it looks like it should be presented in a better way, considering those not easy to spot differences.

The I2C/TWI/TWIM pins are not just connected to the user nRF5340 but also to the interface nRF5340; we have no idea what that does and no way to isolate these pins from the interface nRF5340.

There is an nRF only mode switch on the nRF5340 DK.

Best regards,

Michal

[hmolesworth]

Thanks for the information; however it looks like the nRF Only switch removes power from the interface MCU but leaves the i2c SCL and SDA pins connected to both nRF5340 MCUs, as I noted above, which will phantom power (back-drive) the interface MCU via pull-ups on those 2 lines when we use the i2c/TWIM. I haven't tested this, as I only have one board which I don't want to stress ..

[Michal]

No, that is not correct.

From the documentation:

It also disconnects the signal lines between the nRF5340 System on Chip (SoC) and the interface MCU using analog switches.

I have also confirmed that with the nRF5340 DK schematic, we are indeed using FSA2466UMX analog switches as can be seen on the screenshot below (from version 2.0.0):

Best regards,

Michal

[hmolesworth]

I think I disagree, if I may; the analog switches don't isolate the I2C signals as they are connected directly by AE1 and AF2, they look like net names, so even with the interface MCU held in reset using I2C would back-drive the interface MCU:

User nRF5340 U1        Interface nRF5340 U2
====================== ====================
U1 P1.02 AE1 P1.02/I2C U2 P1.02 AE1
U1 P1.03 AF2 P1.03/I2C U2 P1.03 AF2

Hopefully I am wrong and AE1 and AF2 are simply labels and not net names ..

[Michal]

AE1 and AF2 are pin numbers on the aQFN94 package, please take a look in the documentation:

https://infocenter.nordicsemi.com/topic/ps_nrf5340/chapters/pin.html?cp=4_0_0_8_0

The net names/labels are P1.02/I2C and P1.03/I2C

I have double checked our DK design in Altium as well and yes, they are isolated via those analog switches when the "nRF only mode" switch is on.

Best regards,

Michal

[hmolesworth]

Of course, thanks for pointing that out :-)