nRF91 series reset pin pull-up voltage

[Jayant Tang]

Hello DevZone,

One of the customer meets the problem that their product will reset by EMI. I'm sure it's because of EMI, since this issue can be avoided by cutting off the reset pin.

They don't put a capacitor to GND on the reset pin, but put a TVS on it. I think the capacitor is the key point. But they have more question about this.

1. The spec says there is a pull-up resistor inside the SiP. Why the voltage is 2.2V? The high level of a GPIO is 0.7 x GPIO_VDD = 0.7 x 3.3 = 2.31V. The 2.2V should be an undefined level.

2. If add an external pull-up resistor to 3.3V, will it bring more power consumption?

3. Is external pull-up resistor necessary? 

Best regards,

Jayant

[mathiaso]

Hi, Jayant.

1. The spec says there is a pull-up resistor inside the SiP. Why the voltage is 2.2V? The high level of a GPIO is 0.7 x GPIO_VDD = 0.7 x 3.3 = 2.31V. The 2.2V should be an undefined level.

The reason is that nRESET and the GPIOs are connected to different voltage domains.

2. If add an external pull-up resistor to 3.3V, will it bring more power consumption?

Adding an external pull-up resistor to 3.3 V will feed the internal 2.2 V voltage with a voltage that then is higher. This is not recommended. As can be seen in the picture you included above, "driving nRESET high with a voltage lower than 2.2 V will result in additional leakage".

3. Is external pull-up resistor necessary? 

No, there should not be used an external pull-up resistor. See the note in the pin assignments as well.

Best regards,
Mathias

[Jayant Tang]

Hello Mathias,

The customer cares about what is the real low level of the nRESET. Is it 2.2x0.3 = 0.66V? We have tested it that the 9161 will reset at about 1.0V. 
By the way, the reset issue has been fixed after adding a capacitor.

Best regards,

Jayant.

[mathiaso]

Hi, Jayant.

Sorry for the late reply.

I have neither been able to get a conclusive answer about this from anywhere, nor have I been able to test it, but your reasoning sounds like it makes sense.

I'm happy to hear the issue has been fixed.

Best regards,
Mathias

[mathiaso]

I have btw created an internal ticket regarding the nRESET pin LOW level voltage not being included in the PS. So hopefully it will be included there in the future.

[mathiaso]

Hi, Jayant.

Sorry for the delayed response but I've now received an answer regarding the voltage levels of nRESET. The values are found from threshold measurements.

• nRESET active when V_nRESET < 0.8V - 0.9V (normal mode to reset state).

• nRESET release when V_nRESET > 0.7V - 0.8V (reset state to normal mode).