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Why does my nRF51822 consume > 1 mA in sleep?

No matter what sleep mode I put my nRF51822 in (system on, idle, system-off), it seems that the base current is above 1 mA. Is this how it's supposed to be?

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  • No, this is most definitely not a reasonable measurement. When in system on, idle, the consumption should be ~3 µA, and in system off < 1 µA. These numbers are given in table 23 (Power management) in the nRF51822 PS.

    There is primarily one suspect when seeing consumption above 1 mA in sleep, and that is the debug interface. The debug interface of the chip will stay enabled after having flashed it, and will not be disabled until a full reset (i.e. removing and re-applying voltage to the chip).

    If this does not help, you should consider which peripherals you have running. Table 24 in the PS shows which peripherals needs which clock sources and regulators, and as a rule-of-thumb, anything that requires the 16 MHz clock is high power, while everything else is low-power. In general, as many peripherals as possible should be powered down while in sleep, by setting their ENABLE registers to 0 or similar.

    Edit: To understand power management on the nRF51 series devices a little better, this question may also be useful.

    Also, as Ello points out below, you can do a pin-reset to disable the debug interface by using

    
    nrfjprog -p
    
    
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  • No, this is most definitely not a reasonable measurement. When in system on, idle, the consumption should be ~3 µA, and in system off < 1 µA. These numbers are given in table 23 (Power management) in the nRF51822 PS.

    There is primarily one suspect when seeing consumption above 1 mA in sleep, and that is the debug interface. The debug interface of the chip will stay enabled after having flashed it, and will not be disabled until a full reset (i.e. removing and re-applying voltage to the chip).

    If this does not help, you should consider which peripherals you have running. Table 24 in the PS shows which peripherals needs which clock sources and regulators, and as a rule-of-thumb, anything that requires the 16 MHz clock is high power, while everything else is low-power. In general, as many peripherals as possible should be powered down while in sleep, by setting their ENABLE registers to 0 or similar.

    Edit: To understand power management on the nRF51 series devices a little better, this question may also be useful.

    Also, as Ello points out below, you can do a pin-reset to disable the debug interface by using

    
    nrfjprog -p
    
    
Children
  • I am currently using GPIOTE pin to wake up system from deep sleep mode. According to PS table 33 GPIOTE requires both 1.2V regulator and HFCLK. Look back to table 32. Which requires 520uA. But I actually measured my power consumption is about 100uA. I am sure HFCLK is not working when system is off. Is there any possibility I can make the power consumption any lower with GPIOTE wakeup feature on? Or how it suppose to be with 4 GPIOTE wakeups during deep sleep?

  • Can I achieve the results of "nrfjprog -p" commands by code itself?
    I have written following lines in my code, will it result same as "nrfjprog -p"

    void main()
    {
    if( ( NRF_UICR->APPROTECT & 0xFF ) == 0xFF )
    {
    // enable UICR register write mode
    NRF_NVMC->CONFIG = ( NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos );
    while( NRF_NVMC->READY == NVMC_READY_READY_Busy );

    // disable debug mode
    NRF_UICR->APPROTECT = 0;

    // disable UICR register write mode
    NRF_NVMC->CONFIG = ( NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos );
    while( NRF_NVMC->READY == NVMC_READY_READY_Busy );

    // reboot is required to apply changes
    NVIC_SystemReset();
    }

    // continue application
    }

     

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