Would MPSL automatically set some gpio pins to be used to control CTX and RTX pins of the SKY66112-11 FEM for TX/RX operations?

Hello my friends,

we have a custom board which includes an nRF52832 being chained to SKY66112-11 FEM.

Investigating the radio.c file in the radio-test example, I realized that we can configure the FEM in the application code, for example:

int fem_tx_configure(uint32_t ramp_up_time)
{
	int32_t err;

	fem_activate_event.event.timer.counter_period.end = ramp_up_time;

	err = mpsl_fem_pa_configuration_set(&fem_activate_event, &fem_deactivate_evt);
	if (err) {
		printk("PA configuration set failed (err %d)\n", err);
		return -EFAULT;
	}

	return 0;
}

However, for the FEM to work correctly, we need to set/clear CTX or RTX pins of the FEM via the nRF chip's GPIO pins that are connected to the FEM.

I am wondering how this control signal is generated automatically as we do NRF_RADIO->TXENABLE=1U or NRF_RADIO->RXENABLE=1U.

I already checked the radio.c fem_configure API and all I could conclude was that, it basically configure a timer. For instance, mpsl_fem_pa_configuration_set() API for the TX events.

However,  there is not a clear path to follow to understand how a radio event like TXENABLE=1 would translate into a GPIO pin high on a pin that can be connected to the FEM's CTX pin. Or how this timer configuration relates to the FEM control through the GPIO pins.

I am using MPSL for my proprietary communication protocol.

Does MPSL automatically set/clear some GPIO pins for every TX/RX radio events? If not, then how one can configure the FEM to be functional when using MPSL?
Is there any PPI channel that automatically sets some GPIO pins high and low for every TX/RX radio events? 
Is there a way to configure the MPSL to automatically send the control signal to FEM through specific GPIO pins and with appropriate timing?

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