SPI HCI increasing low power consumption

[Guillaume Bignon]

Hi Nordic,

In my project, I have a NRF9160 and a NRF52832 with a ble host/controller stack over SPI HCI on NCS v2.5.2

As soon as I activate the HCI SPI in my project, the sleep current comsumption increase from ~26µA to ~68µA (delta is 42µA).

Is it possible to use HCI SPI without increasing current comsumption that much?

[Einar Thorsrud]

Hi,

I would not expect a significant incraese in idle current consumption because of that. Some initial questions:

• When you write sleep current consumption is this actually just the idle current consumption, or is it a more "over all" system sleep where there is also advertising or similar? 
• Is it the nRF61 or nRF52 that has the increased current consumption (or both, and if so, how much on each)?

[Guillaume Bignon]

Hello Einar,

Thanks for the reply. Yes, when I said sleep, I meant idle.

Some additional information:

The NRF9160 is powered by 3.6V, but VDD_GPIO is feeded by 3V.
The NRF52832 is powered by 3V.
I measure the currents with a keithley 2700, it's accurate bellow µA.

And it's the power consumption that I'm measuring:

	without HCI SPI	with HCI SPI
NRF9160 3V6 (VDD1 and VDD2)	less than 1µA	less than 1µA
NRF9160 3V (VDD_GPIO)	~3.5µA	33µA
NRF52832 3V	2.5µA	10µA

[Einar Thorsrud]

Hi,

Thank you for elaborating. The increase you see on the nRF52832 acting as SPI slave is within what we would expect (mostly caused by interrupt enabled on the CSn pin, being used as a wakeup source).

On the 91 that acts as SPI master it is different, there I would not expect a significant current consumption when there are no transactions. Can you share plots showing the idle current consumption on the 91 side with and without HCI over SPI enabled?

[Guillaume Bignon]

Hi, 

Here are the plots you asked:

Without HCI:

3V nrf91

3V6 nrf91

With HCI:

3V nrf91

3V6 nrf91

[Einar Thorsrud]

Hi,

Thank you for the plots. Could it be that the MISO pin ion the SPI master s floating when not driven by the SPI slave? (The MISO is high impedance when the slave select signal is not asserted). If so, that could potentially explain the current consumptino you are seeing.

[Guillaume Bignon]

Hello, on both sides, the pins are configured with low-power activation on pinctrl-1, so master and slave should be in high z. And there is no physical pullup or pulldown on these signals.

On NRF52 side : 

	spi0_default: spi0_default {
		group1 {
			psels = <NRF_PSEL(SPIS_SCK, 0, 29)>,
			        <NRF_PSEL(SPIS_MISO, 0, 27)>,
			        <NRF_PSEL(SPIS_MOSI, 0, 28)>,
			        <NRF_PSEL(SPIS_CSN, 0, 30)>;
		};
	};
	spi0_sleep: spi0_sleep {
		group1 {
			psels = <NRF_PSEL(SPIS_SCK, 0, 29)>,
			        <NRF_PSEL(SPIS_MISO, 0, 27)>,
			        <NRF_PSEL(SPIS_MOSI, 0, 28)>,
			        <NRF_PSEL(SPIS_CSN, 0, 30)>;
			low-power-enable;
		};
	};

&spi0 {
	compatible = "nordic,nrf-spis";
	status = "okay";
	def-char = <0x00>;
	pinctrl-0 = <&spi0_default>;
	pinctrl-1 = <&spi0_sleep>;
	pinctrl-names = "default", "sleep";
	cs-gpios = <&gpio0 30 0>;
	bt-hci@0 {
		compatible = "zephyr,bt-hci-spi-slave";
		reg = <0>;
		irq-gpios = <&gpio0 14 (GPIO_ACTIVE_HIGH)>;
	};
};

On NRF91 side:

	spi0_default: spi0_default {
		group1 {
			psels = <NRF_PSEL(SPIM_SCK,  0,  2)>,
			        <NRF_PSEL(SPIM_MISO, 0,  0)>,
			        <NRF_PSEL(SPIM_MOSI, 0,  1)>;
		};
	};
	spi0_sleep: spi0_sleep {
		group1 {
			psels = <NRF_PSEL(SPIM_SCK,  0,  2)>,
			        <NRF_PSEL(SPIM_MISO, 0,  0)>,
			        <NRF_PSEL(SPIM_MOSI, 0,  1)>;
			low-power-enable;
		};
	};

&spi0 {
	compatible = "nordic,nrf-spim";
	status = "okay";
	pinctrl-0 = <&spi0_default>;
	pinctrl-1 = <&spi0_sleep>;
	pinctrl-names = "default", "sleep";
	cs-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>,
			   <&gpio0 3 GPIO_ACTIVE_LOW>,
			   <&gpio0 31 GPIO_ACTIVE_LOW>;

	accelero: spi0-accelero@0 {
		reg = <0>;
		status = "okay";
		compatible = "st,lis2dh";
		spi-max-frequency = <DT_FREQ_M(8)>;
		irq-gpios = <&gpio0 7 0>, <&gpio0 5 0>;
	};
	baro: spi0-baro@1 {
		compatible = "st,lps22hh";
		status = "okay";
		reg = <1>;
		spi-max-frequency = <DT_FREQ_M(8)>;
		odr = <1>; // LPS22HH_DT_ODR_1HZ
	};
	bt-hci@2 {
		compatible = "zephyr,bt-hci-spi";
		reg = <2>;
		irq-gpios = <&gpio0 29 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
		reset-gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
		spi-max-frequency = <DT_FREQ_M(1)>;
	};
};

How can I check if there is an issue there ?

[Einar Thorsrud]

Hi,

I do not think the sleep configuration for the SPI pins on the 91 side matter, as pm_device_action_run() is not used. So if you check the GPIO.PIN_CNF register for the MISO pin with a debugger I expect you will see that it is always configured as an input. It could also be interesting to test if this is the problem by putting a weak (high resistance value) pull-up resisotor on the MISO pin and see if that affects the sleep power consumption.

[Guillaume Bignon]

Hi,

Indeed, the MISO pin remains configured as input.

Putting a pull-up (~800k) on MISO does not affect idle power consumption.

I wonder if this high current could come from the interrupt on the IRQ pin that remains configured?

I see in the datasheet that it's supposed to consume 17.8µA at 3.7V. Does this current increase with a VDD_GPIO at 3V?

[Einar Thorsrud]

Hi,

I am sorry for the late reply.

The typical current consumption with wake onn GPIOTE is 17.8 µA as you fond. This is regardless of the VDD_GPIO voltage.