Where is a detailed description of nRF peripheral registers

[osenjw]

[hide preview]

.

I am looking for a detailed description of the Memory Protection Unit for the nRF51822 as described at a high level in nRF51822_PS v3.1.pdf.

I know where the peripheral is: 0x400000000. But if I were to try to protect page 0x80, I would not know which bit in which register I should flip.

I am sure I will have similar questions on other registers.

I have just completed three years of M4 programming. The TI chip spec had these registers detailed down to the bit.

I feel like I have missed a higher or lower level document on the nRF-M0.

Would you point me to the reference I seek?

[RK]

Top of this page, SDK and Documentation. Nordic Infocentre. nRF51 series. Reference Manual. That's the reference for the series. The product spec (PS) is the per-chip document and has just the detailed chip specs over and above the series reference.