nRF52832 TWI0 and SPI1 conflicts

[HanCatNguyen]

Hi,

I have the separate working codes for the TWI0 and the SPI1. However, when I combine them, it doesn't work: sometimes it takes forever waiting for the NRF_DRV_TWI_EVT_DONE after nrf_drv_twi_tx(), sometimes it makes the SPI communication stops, but I didn't get any errors when those happened. If I comment the TWI0 part or the SPI1 part out, then the other part still works fine so definitely something is wrong when I try to put them together.

I'm having two separte GPIOTE interrupts for receiving data from TWI0 and SPI1. The priority level of TWI0 and SPI1 are both 6, and the priority level of the GPIOTE is 7.

Here is the link to my sdk_config.h file: drive.google.com/.../view. May you let me know what can be wrong?

Thanks,

Han

[Amanda Hsieh]

Hello,

Most of the staff is away for a long weekend in Norway, so there will be some delays in response time. Thanks for your patience.

[HanCatNguyen]

Thanks.

I have just realized that my TWI works when I connected a logic analyzer to the SDA and SCL pins, but it returns the NRF_DRV_TWI_EVT_ADDRESS_NACK if I didn't have the logic analyzer connected. I have verified that the ICM20948 module I'm using has 10kOhm pull-up resistors connected to SDA and SCL. I have tried changing the SDA and SCL pins configuration to no-pull instead of pull-up, but still the same unstable TWI communication.

#define SCL_PIN_INIT_CONF \
( (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) \
| (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) \
| (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) \
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) \
| (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos))

#define SDA_PIN_INIT_CONF SCL_PIN_INIT_CONF

#define SDA_PIN_UNINIT_CONF \
( (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) \
| (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) \
| (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) \
| (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) \
| (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos))

#define SCL_PIN_UNINIT_CONF SDA_PIN_UNINIT_CONF

#define SCL_PIN_INIT_CONF_CLR \
( (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) \
| (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) \
| (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) \
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) \
| (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos))

What else can cause this, and how may I fix it?

[HanCatNguyen]

Actually, never mind. I think I've figured it out: after adding capacitors to the I2C lines and SPI lines (and to GND), both communications seem to be stable now.