i2c communication problems

[billt79]

Hi,

I have been having a lot of problems communicating with an Atmel SAM D09 as a slave, and an nrf51422 as a master.

I seem to have two problems, hopefully solving just one will get me where I need to be. but I can't seem to narrow it down. The first issue, I have been trying to use a slightly modified twi_sw_master.c to communicate with the slave, this has worked with plenty of other i2c devices out there, like EEPROMs Acelerometers, and PMICs however the Atmel won't ack. The reason I believe this to be a problem, is it doesn't run at exactly 100Khz (best i can get is 94Khz), this seems highly unlikely to me, but it is the only thing that is apparent as the Atmel is returning no error while polling the interrupt flags, and all the config is set as required. It is also pulling up both of its i2c pins, which would indicate that it is working. I have done plenty of debugging with uart, and all seems normal.

To get around this i have tried using twi_hw_master.c to work, and i do get 100Khz exactly, however the waveform i see on my scope looks wrong. To my understanding, there are 9 clock pulses on SCL, the last one being for an ack/nack, this was present on the sw version, but on the hw version it is not present and there also does not appear to be a valid stop condition, although no data is being transferred due to the lack of an ack. My aim is to use the self programming function of the Atmel SAM to update it OTA via the BLE on the nrf. the code on the Atmel is from the ASF, so i can be quite sure it works. Also worth noting that the Atmel chip is configured to respond to any address between 0-127 regardless. Unfortunately for me i am very restricted on GPIOs on the nrf, so using something else is out of the question.

[RK]

After the master has clocked out the 8th bit and the clock is low, it just waits to see if the slave ACKs by pulling SDA low, it doesn't actually need to clock until it sees that, it can wait. This also gives slow slaves a little time to ACK. So a 9th clock pulse isn't necessary until SDA goes low for the ACK. In this case the Atmel doesn't pull low, so that's the end of the transaction.

You said, right at the top, that the D09 is configured to accept any address. I still don't see an ASF example which does that. So you have ADDR 17..26 set to zero (that's ADDR.ADDRMASK), 1..10 set to 127 (that's ADDR.ADDR) and CTRLB.AMODE set to 0x02 to enable the range? Oh and 10bit addressing is off and GENCEN also off. If all those are the case then it should respond to any address. Most of the examples I've seen used a fixed address and there isn't even an I2C example for the D09 for some reason.