I have a chip that I need to read from connected via SPIM. As one might expected, I have a FIFO I need to read from and a data ready interrupt to trigger the read. As an added complication, reading from the FIFO doesn't reset the interrupts, so there's a separate status register I need to read after the FIFO read to reset the data ready interrupt. This is all happening at a high frequency, so i'd like to do it at the hardware level.
I know how to use PPI to set up a read from SPIM based on an interrupt. Is there a good way to add a second read after the first one? I need each read to include a full toggle of the chip select pin, I haven't seen any examples for PPI that set up multiple sequential SPIM transfers.
Simon
