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  • Case ID: 329881
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nrf5340 nReset Externall Driven 3.3V

Devin M

Hi,

We have a nrf5340 module on a custom PCB that is connected to a computer through use of a pcie header. This PCIE header allows USB communication to the module and supplies 3.3v. This 3.3v is boosted to 5v on the custom PCB for VBUS line, but VDD/VDD_H is supplied with the 3.3v power. Only other connections are for USB data lines.

For nReset the designer of this board put it directly to the PCIE reset pin, without any extra circuitry. This PCIE Reset Pin is only able to actively drive low/high. If this nReset pin is externally driven to 3.3v at all times, would this cause issues with the nrf5340 Module due to it having an internal pullup to 3.3v? Or is this fine? My assumption is that this is bad design and a transistor should be put on there to handle the input of the PCIE Reset to leave it set to GND or floating with asserted, but wondering if the change is necessary. 

Thanks in advance! Let me know

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    Through your description, I think you are expressing whether there is a problem if the nRF5340 nRESET pin is pulled high by the PCIE Reset Pin for a long time.
    For this problem, I don't think it will matter much as long as the PCIE Reset Pin voltage is consistent with the nRF5340 VDD, although the PCIE Reset Pin usually needs to be kept high if the 5340 is to work properly.
    If the product needs to have strict stability requirements, you can consider connecting the PCIE Reset Pin to the 5340 nReset Pin via a reverse drive, provided that the PCIE output cannot be changed.

    Hope this answer can help you.

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  • 0

    Through your description, I think you are expressing whether there is a problem if the nRF5340 nRESET pin is pulled high by the PCIE Reset Pin for a long time.
    For this problem, I don't think it will matter much as long as the PCIE Reset Pin voltage is consistent with the nRF5340 VDD, although the PCIE Reset Pin usually needs to be kept high if the 5340 is to work properly.
    If the product needs to have strict stability requirements, you can consider connecting the PCIE Reset Pin to the 5340 nReset Pin via a reverse drive, provided that the PCIE output cannot be changed.

    Hope this answer can help you.

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  • 0 in reply to Search

    Thank you that answers my question. The PCIE Reset output can be controlled, but it can only be driven to High or Low, and not left floating, so I just wanted to make sure this would cause no problems with the Internal Pullup. I agree, due to the source of VDD and GND being the same. It would be better probably to have a Transistor Gate to allow the nReset pin to float, if PCIE Reset is High, but from the sounds of your answer that is unnecessary for a change of design. 

    Thanks!

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