nRF52840 input pin(A12 P0.02 Digital I/O) usage.

[Munkhdelger]

Hello.

I am developing device using nRF52840 and i have question about IO pin usage.

The circuit is currently providing voltage to the A12 pin (Digital I/O), but it is not providing voltage to the A22 pin (Power supply).

Is there any problem with it?(product longevity or inconsistency wise) 

Edit:

 For easier to understand I am gonna simplify my question.

 Can i getting Input (A12 Pin) while this SoC not turned on (A22 = 0V power supply.)

Is there any problem getting input while Soc is off? 

Thank you!

[Search]

According to your description, the possible reason is that nRF works in VDDH mode, at which time IO output level can be configured through registers. For specific information, please refer to nRF52840 Product Specification v1.10 -- 5.3.1.2 GPIO levels. Hope the above information is useful to you!

Ref:5.3.1.2 GPIO levels
5.3.1.2 GPIO levels   The GPIO high reference voltage is equal to the level on the VDD pin. In Normal Voltage mode, the GPIO high level equals the voltage supplied to the VDD pin. In High Voltage mode, it equals the level specified in register REGOUT0 on page 63.

[Munkhdelger]

current circuit works as intended without any problem (VDDH mode) but  my circuit built like providing voltage to the Digital I/O when there is no voltage on VDD. So i just wondering is there any problem with it.  

[SwRa]

Hello,

Munkhdelger said:

So i just wondering is there any problem with it.  

Nope.. There are no restrictions. As long as it is within the specs, there would be no issue in doing it the way you do.

Regards,

Swathy