No the DFU service won't be able to update anything in region 0 if region 0 is defined, ie CLENR0 is set to something other than the default. If you look at the table in the MPU chapter you'll see that ALL has more to do with debugger access to data, code in region 1 can't read or write to the code space in region 0 in any case where CLENR0 is defined.
This is why, since the advent of the Master Boot Record and basic support for DFU, loading the softdevice no-longer sets CLENR0. I think the nRF52 does away with all the region0/region1 stuff and protection is limited to turning the debugger access off.
It's not clear why a readback protection would prevent you from writing? If you could write to region 0 you could clear one page in region 0, write a tiny piece of code to it which dumps the rest of the pages you didn't clear to wherever you like and hence subvert much of the read protection.
Thats what my reading of that table says. PALL is on, Code0 protect is off and everything is Region 0 because you haven't defined CLENR0. That prevents any SWD access of anything but allows all your code to read and write all your code and RAM space.
Thats what my reading of that table says. PALL is on, Code0 protect is off and everything is Region 0 because you haven't defined CLENR0. That prevents any SWD access of anything but allows all your code to read and write all your code and RAM space.
