Hello!
I am using an nRF52805 for a custom board design and I am hoping to get some advice on selecting peripherals and Zephyr features that would best meet my system requirements. I'll provide specific details below, but the high level requirements of my system is the generation of two low frequency clocks (differential clocks 0-1.8V, < 5 KHz) that are phase synchronized ,and one higher frequency clock (50% duty, 0-1.8V, < 1.5 MHz) which can be phase independent. All these clocks need to be build time configurable, but don't need to be adjusted at runtime -- that would be nice to have, but it is not a requirement.
1) High frequency clock: Name = HFCLK, Voltage = 0-1.8V, Frequency = 1-1.5 MHz, Duty = 50% (ideally 80%, but 50% is fine), Phase = no phase synchronization required to any other clocks.
2) Low frequency clocks:
- Name = CLK/CLKIB, Voltage = 0-1.8V, Frequency = 2.5-5 KHz, Duty = 50%, Phase = synchronous with UDI/UDIB clock.
- Name = UDI/UDIB, Voltage = 0-1.8V, Frequency = 150 - 300 Hz, Duty = 50%, Phase = synchronous with CLK/CLKIB, rising/falling edge must occur before rising edge of CLK.
Here is a simple timing diagram of the low frequency clocks:
I have previously implemented these clocks on an nRF52840 programmed with PlatformIO/Arduino. The low frequency clocks were generated using a timer ISR that contains counters and handles toggling GPIO to create the desired waveforms. The higher frequency clock is generated using hardware PWM, where I simply set the PWM frequency and duty to achieve the clock requirements.
Now I am using the nRF52805 which does not have PWM hardware, and I've been unsuccessful in programming it with PlatformIO/Arduino. Since this design is so simple, I figured it would be a good opportunity to try out the nRF Connect SDK in VS Code and use Zephyr. So far I have been able to add all my pins to my device tree and toggle them in software. Now I am looking to figure out what the best peripherals and Zephyr features I should leverage to make my design the most efficient in terms of power and CPU utilization. Just to clarify, the current design doesn't really need to do anything else beyond generating these clock (for now), so I could likely get away with using a hardware timer, an ISR and software timers to toggle these pins directly with the CPU, but that doesn't lend itself well to a future if I wanted to implement additional features like BLE etc.
Questions:
- For the HFCLK: 1) Are there any recommended peripherals on the nRF52805 I could use to generate a 1-1.5 MHz clock with minimal CPU intervention? e.g. GPIOTE, SPI etc. 2) Are there any Zephyr examples of generating a clock that you recommend I start with and modify? 3) Would be possible to just use a hardware timer + ISR to generate this clock with manual GPIO toggling?
- For the LFCLKs: 1) Would you recommend using a peripheral (e.g. GPIOTE), or utilize something like a timer + ISR + software counters to toggle GPIO to generate these clocks? 2) Are there any Zephyr examples of implementing something similar to this that you could recommend I start with?
Cheers,
Parker