AD conversion values on the NRF52811 installed on the custom board differ from expectations.

I am using an N52811 QFN32 on a custom board.

I modified the SAADC sample as follows and ran it on this board.
(3.0V was input to AIN2.)

void saadc_init(void)
{
    ret_code_t err_code;

    nrf_drv_saadc_config_t saadc_config = NRF_DRV_SAADC_DEFAULT_CONFIG;
    saadc_config.resolution = NRF_SAADC_RESOLUTION_12BIT;

    nrf_saadc_channel_config_t channel_config =
        NRF_DRV_SAADC_DEFAULT_CHANNEL_CONFIG_SE(NRF_SAADC_INPUT_AIN2);
    channel_config.gain = NRF_SAADC_GAIN1_6;

    err_code = nrf_drv_saadc_init(&saadc_config, saadc_callback);
    APP_ERROR_CHECK(err_code);

    err_code = nrf_drv_saadc_channel_init(0, &channel_config);
    APP_ERROR_CHECK(err_code);

    err_code = nrf_drv_saadc_buffer_convert(m_buffer_pool[0], SAMPLES_IN_BUFFER);
    APP_ERROR_CHECK(err_code);

    err_code = nrf_drv_saadc_buffer_convert(m_buffer_pool[1], SAMPLES_IN_BUFFER);
    APP_ERROR_CHECK(err_code);

}

However, p_event->data.done.p_buffer[] returns a value around 1750, which is about half of what the specification would suggest.

When I run the same program on an nRF5 DK (PCA10056), it gives a value of about 3380, which I believe is correct.

When I directly measure the voltage between PIN 29 (VSS) and PIN 4 (P0.04/AIN2) on the custom board’s chip, it correctly shows 3.0V.

Is there any other configuration that might affect the SAADC?

Parents
  • AIN2 is P0.04, just checking .. pin 6 on QFN48 and pin 4 on QFN32

    In case there is a higher impedance (== slower signal rise time) than expected on AIN2, maybe try lengthening the sample time from 10uSecs to 40uSecs (maximum available) to see if it makes a difference:

        channel_config.gain = NRF_SAADC_GAIN1_6;
        channel_config.acq_time = NRF_SAADC_ACQTIME_40US;

    "The required acquisition time depends on the source (Rsource) resistance. For high source resistance the acquisition time should be increased"

    TACQ [us] Maximum source resistance [kOhm]
          3                   10
          5                   40
          10                 100
          15                 200
          20                 400
          40                 800

  • Thank you for your response. I don't have much hardware knowledge, so your help is appreciated.

    AIN2 is P0.04, just checking .. pin 6 on QFN48 and pin 4 on QFN32

    I apologize for not mentioning earlier, but the chip I am using is in a QFN32 package.

    In case there is a higher impedance (== slower signal rise time) than expected on AIN2, maybe try lengthening the sample time from 10uSecs to 40uSecs (maximum available) to see if it makes a difference:

    I checked, but there was no change in the values.

    Additionally, for reference, the test is being conducted with a DC input.

Reply
  • Thank you for your response. I don't have much hardware knowledge, so your help is appreciated.

    AIN2 is P0.04, just checking .. pin 6 on QFN48 and pin 4 on QFN32

    I apologize for not mentioning earlier, but the chip I am using is in a QFN32 package.

    In case there is a higher impedance (== slower signal rise time) than expected on AIN2, maybe try lengthening the sample time from 10uSecs to 40uSecs (maximum available) to see if it makes a difference:

    I checked, but there was no change in the values.

    Additionally, for reference, the test is being conducted with a DC input.

Children
Related