SPI Slave not working on nRF9160DK

Hello,

I'm trying to get some basic SPI communication between the nRF91 and nRF52 chips on the nRF9160DK. We have been using UART for this communication however we want to move to SPI so we can connect some additional chips to the nRF52. 

Using the same interface lines as we were with UART1 I can see the data coming from the nRF52 chip across to the nRF91 on the logic analyzer, but for some reason the data isn't making it into the RX buffer on the nrf9160. 

Applications can be found here: https://github.com/mbush91/nrf9160dk_spi_test

To recreate: Grab a nRF9160DK, flash the nrf52 and nrf91 applications and open the usb consoles to see data.

I've tried both sync and async spi calls and the slave is even triggering on the master writes but the data doesn't match. 

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  • Hello,

    Which SDK version are you using? I reviewed the 91 overlay, and it looks good to me. However, please check if the selected pins (P0.17, P0.18, P0.19, and P0.21) are not being used by other peripherals or functions in the application. If any of these pins were previously used for UART1, ensure that disabling the UART has fully released them for SPI use.

    Could the issue be that the nRF52 is not correctly driving the SPI clock (SCK) as the master and is not initiating SPI transactions? The SPI slave (nRF91) relies on the master to start transactions, so if there’s no active clock signal from the master, that could explain why the RX buffer on the nRF91 isn't receiving data. Can you verify this with a logic analyzer or oscilloscope?

    Kind regards,
    Abhijith

Reply
  • Hello,

    Which SDK version are you using? I reviewed the 91 overlay, and it looks good to me. However, please check if the selected pins (P0.17, P0.18, P0.19, and P0.21) are not being used by other peripherals or functions in the application. If any of these pins were previously used for UART1, ensure that disabling the UART has fully released them for SPI use.

    Could the issue be that the nRF52 is not correctly driving the SPI clock (SCK) as the master and is not initiating SPI transactions? The SPI slave (nRF91) relies on the master to start transactions, so if there’s no active clock signal from the master, that could explain why the RX buffer on the nRF91 isn't receiving data. Can you verify this with a logic analyzer or oscilloscope?

    Kind regards,
    Abhijith

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