Not able to interface SD card with nrf52840dk_nrf52840

I have created the sample_fs project from subsys/fs/sample_fs. I have not made any changes to the project. I have built it and flashed it onto a nrf52840dk. But I'm getting errors.

*** Booting nRF Connect SDK v3.5.99-ncs1-1 ***

[00:00:00.255,706] <err> main: Storage init ERROR!
[00:00:00.261,413] <err> fs: fs mount error (-5)
Error mounting disk.
[00:00:00.268,859] <err> fs: fs not mounted (mp == 0x20000000)

i tried check the code to see which spi pin it is using but i couldnt find it so i assumed it is spi0 and gave the connections according to the device tree file for spi0. How do I choose the spi? Also i have seen in so
i am using v2.6.1 for both toolchain and nrf connect sdk in VS code.

  • Unmodified example code will store the data either in the code flash of the NRF52840 or in the QSPI NOR flash on the DK.

    Check the finished dts (build dir / zephyr subdir) for details.

    You will need quite a few changes in the overlay in order to enable SD SPI support, this will also set the spi peripherial used and the pins either directly or indirectly.

  • i saw this post devzone.nordicsemi.com/.../sd-card-error-using-fs_sample-zephyr-example-code and am facing the exact same error here is the output after making changes mentioned in this post.
    *** Booting nRF Connect SDK v3.5.99-ncs1-1 ***
    [00:00:00.255,798] <err> disk: disk interface already registered!!
    [00:00:00.262,908] <err> flashdisk: Failed to register disk SD error -22
    [00:00:00.270,599] <dbg> sd: sd_init_io: Host controller support 3.3V max
    [00:00:00.278,076] <dbg> sd: sd_init_io: Resetting power to card
    [00:00:00.288,360] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd0 arg 0x0
    [00:00:00.295,959] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd8 arg 0x1aa
    [00:00:00.303,710] <dbg> sd: sd_send_interface_condition: Found SDHC with CMD8 support
    [00:00:00.312,347] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd59 arg 0x1
    [00:00:00.320,037] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd58 arg 0x0
    [00:00:00.327,789] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:00.335,479] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:00.353,851] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:00.361,541] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:00.394,836] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:00.417,449] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:00.450,775] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:00.473,388] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:00.506,713] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:00.529,327] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:00.562,622] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:00.585,235] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:00.618,560] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:00.641,174] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:00.674,468] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:00.697,052] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:00.730,377] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:00.752,960] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:00.786,285] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:00.808,898] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:00.842,193] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:00.864,807] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:00.898,101] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:00.920,715] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:00.954,010] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:00.976,593] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:01.009,918] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:01.032,531] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:01.065,826] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:01.088,439] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:01.121,734] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:01.144,348] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:01.177,673] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:01.200,286] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:01.233,612] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:01.256,225] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:01.289,550] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:01.312,164] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:01.345,489] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:01.368,103] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:01.401,428] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:01.424,041] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:01.457,336] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:01.479,949] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:01.513,275] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:01.535,888] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:01.569,183] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:01.591,796] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:01.625,091] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:01.647,705] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:01.680,999] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:01.703,613] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:01.736,907] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:01.759,521] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:01.792,816] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:01.815,399] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:01.848,693] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:01.871,307] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:01.904,602] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:01.927,215] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:01.960,510] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:01.983,123] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:02.016,418] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:02.039,031] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:02.072,326] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:02.094,940] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:02.128,234] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:02.150,817] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:02.184,112] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:02.206,695] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:02.240,020] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:02.262,603] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:02.295,928] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:02.318,511] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:02.351,806] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:02.374,420] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:02.407,714] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:02.430,328] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:02.463,623] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd55 arg 0x0
    [00:00:02.486,206] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:02.509,674] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd41 arg 0x40000000
    [00:00:02.532,867] <err> sd: Failed to query card OCR
    [00:00:02.553,771] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd0 arg 0x0
    [00:00:02.576,263] <err> main: Storage init ERROR!
    [00:00:02.596,893] <dbg> sd: sd_init_io: Host controller support 3.3V max
    [00:00:02.619,293] <dbg> sd: sd_init_io: Resetting power to card
    [00:00:02.644,500] <dbg> sdhc_spi: sdhc_spi_send_cmd: cmd0 arg 0x0
    [00:00:02.668,304] <err> sd: Card error on CMD0
    [00:00:02.688,629] <err> fs: fs mount error (-5)
    Error mounting disk.
    [00:00:02.725,952] <err> fs: fs not mounted (mp == 0x20000000)

    devicetree

    /*
     * Copyright (c) 2017 Linaro Limited
     *
     * SPDX-License-Identifier: Apache-2.0
     */
    
    /dts-v1/;
    #include <nordic/nrf52840_qiaa.dtsi>
    #include "nrf52840dk_nrf52840-pinctrl.dtsi"
    #include <zephyr/dt-bindings/input/input-event-codes.h>
    
    / {
    	model = "Nordic nRF52840 DK NRF52840";
    	compatible = "nordic,nrf52840-dk-nrf52840";
    
    	chosen {
    		zephyr,console = &uart0;
    		zephyr,shell-uart = &uart0;
    		zephyr,uart-mcumgr = &uart0;
    		zephyr,bt-mon-uart = &uart0;
    		zephyr,bt-c2h-uart = &uart0;
    		zephyr,sram = &sram0;
    		zephyr,flash = &flash0;
    		zephyr,code-partition = &slot0_partition;
    		zephyr,ieee802154 = &ieee802154;
    	};
    
    	leds {
    		compatible = "gpio-leds";
    		led0: led_0 {
    			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
    			label = "Green LED 0";
    		};
    		led1: led_1 {
    			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
    			label = "Green LED 1";
    		};
    		led2: led_2 {
    			gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
    			label = "Green LED 2";
    		};
    		led3: led_3 {
    			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
    			label = "Green LED 3";
    		};
    	};
    
    	pwmleds {
    		compatible = "pwm-leds";
    		pwm_led0: pwm_led_0 {
    			pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
    		};
    	};
    
    	buttons {
    		compatible = "gpio-keys";
    		button0: button_0 {
    			gpios = <&gpio0 11 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
    			label = "Push button switch 0";
    			zephyr,code = <INPUT_KEY_0>;
    		};
    		button1: button_1 {
    			gpios = <&gpio0 12 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
    			label = "Push button switch 1";
    			zephyr,code = <INPUT_KEY_1>;
    		};
    		button2: button_2 {
    			gpios = <&gpio0 24 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
    			label = "Push button switch 2";
    			zephyr,code = <INPUT_KEY_2>;
    		};
    		button3: button_3 {
    			gpios = <&gpio0 25 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
    			label = "Push button switch 3";
    			zephyr,code = <INPUT_KEY_3>;
    		};
    	};
    
    	arduino_header: connector {
    		compatible = "arduino-header-r3";
    		#gpio-cells = <2>;
    		gpio-map-mask = <0xffffffff 0xffffffc0>;
    		gpio-map-pass-thru = <0 0x3f>;
    		gpio-map = <0 0 &gpio0 3 0>,	/* A0 */
    			   <1 0 &gpio0 4 0>,	/* A1 */
    			   <2 0 &gpio0 28 0>,	/* A2 */
    			   <3 0 &gpio0 29 0>,	/* A3 */
    			   <4 0 &gpio0 30 0>,	/* A4 */
    			   <5 0 &gpio0 31 0>,	/* A5 */
    			   <6 0 &gpio1 1 0>,	/* D0 */
    			   <7 0 &gpio1 2 0>,	/* D1 */
    			   <8 0 &gpio1 3 0>,	/* D2 */
    			   <9 0 &gpio1 4 0>,	/* D3 */
    			   <10 0 &gpio1 5 0>,	/* D4 */
    			   <11 0 &gpio1 6 0>,	/* D5 */
    			   <12 0 &gpio1 7 0>,	/* D6 */
    			   <13 0 &gpio1 8 0>,	/* D7 */
    			   <14 0 &gpio1 10 0>,	/* D8 */
    			   <15 0 &gpio1 11 0>,	/* D9 */
    			   <16 0 &gpio1 12 0>,	/* D10 */
    			   <17 0 &gpio1 13 0>,	/* D11 */
    			   <18 0 &gpio1 14 0>,	/* D12 */
    			   <19 0 &gpio1 15 0>,	/* D13 */
    			   <20 0 &gpio0 26 0>,	/* D14 */
    			   <21 0 &gpio0 27 0>;	/* D15 */
    	};
    
    	arduino_adc: analog-connector {
    		compatible = "arduino,uno-adc";
    		#io-channel-cells = <1>;
    		io-channel-map = <0 &adc 1>,	/* A0 = P0.3 = AIN1 */
    				 <1 &adc 2>,	/* A1 = P0.4 = AIN2 */
    				 <2 &adc 4>,	/* A2 = P0.28 = AIN4 */
    				 <3 &adc 5>,	/* A3 = P0.29 = AIN5 */
    				 <4 &adc 6>,	/* A4 = P0.30 = AIN6 */
    				 <5 &adc 7>;	/* A5 = P0.31 = AIN7 */
    	};
    
    	/* These aliases are provided for compatibility with samples */
    	aliases {
    		led0 = &led0;
    		led1 = &led1;
    		led2 = &led2;
    		led3 = &led3;
    		pwm-led0 = &pwm_led0;
    		sw0 = &button0;
    		sw1 = &button1;
    		sw2 = &button2;
    		sw3 = &button3;
    		bootloader-led0 = &led0;
    		mcuboot-button0 = &button0;
    		mcuboot-led0 = &led0;
    		watchdog0 = &wdt0;
    		spi-flash0 = &mx25r64;
    	};
    };
    
    &adc {
    	status = "okay";
    };
    
    &uicr {
    	gpio-as-nreset;
    };
    
    &gpiote {
    	status = "okay";
    };
    
    &gpio0 {
    	status = "okay";
    	gpio-reserved-ranges = <0 2>, <6 1>, <8 3>, <17 7>;
    	gpio-line-names = "XL1", "XL2", "AREF", "A0", "A1", "RTS", "TXD",
    		"CTS", "RXD", "NFC1", "NFC2", "BUTTON1", "BUTTON2", "LED1",
    		"LED2", "LED3", "LED4", "QSPI CS", "RESET", "QSPI CLK",
    		"QSPI DIO0", "QSPI DIO1", "QSPI DIO2", "QSPI DIO3","BUTTON3",
    		"BUTTON4", "SDA", "SCL", "A2", "A3", "A4", "A5";
    };
    
    &gpio1 {
    	status = "okay";
    	gpio-line-names = "", "D0", "D1", "D2", "D3", "D4", "D5", "D6",
    		"D7", "", "D8", "D9", "D10", "D11", "D12", "D13";
    };
    
    &uart0 {
    	compatible = "nordic,nrf-uarte";
    	status = "okay";
    	current-speed = <115200>;
    	pinctrl-0 = <&uart0_default>;
    	pinctrl-1 = <&uart0_sleep>;
    	pinctrl-names = "default", "sleep";
    };
    
    arduino_serial: &uart1 {
    	current-speed = <115200>;
    	pinctrl-0 = <&uart1_default>;
    	pinctrl-1 = <&uart1_sleep>;
    	pinctrl-names = "default", "sleep";
    };
    
    arduino_i2c: &i2c0 {
    	compatible = "nordic,nrf-twi";
    	status = "okay";
    	pinctrl-0 = <&i2c0_default>;
    	pinctrl-1 = <&i2c0_sleep>;
    	pinctrl-names = "default", "sleep";
    };
    
    &i2c1 {
    	compatible = "nordic,nrf-twi";
    	/* Cannot be used together with spi1. */
    	/* status = "okay"; */
    	pinctrl-0 = <&i2c1_default>;
    	pinctrl-1 = <&i2c1_sleep>;
    	pinctrl-names = "default", "sleep";
    };
    
    &pwm0 {
    	status = "okay";
    	pinctrl-0 = <&pwm0_default>;
    	pinctrl-1 = <&pwm0_sleep>;
    	pinctrl-names = "default", "sleep";
    };
    
    &spi0 {
    	compatible = "nordic,nrf-spi";
    	/* Cannot be used together with i2c0. */
    	/* status = "okay"; */
    	pinctrl-0 = <&spi0_default>;
    	pinctrl-1 = <&spi0_sleep>;
    	pinctrl-names = "default", "sleep";
    };
    
    &spi1 {
    	compatible = "nordic,nrf-spi";
    	status = "okay";
    	pinctrl-0 = <&spi1_default>;
    	pinctrl-1 = <&spi1_sleep>;
    	pinctrl-names = "default", "sleep";
    };
    
    &spi2 {
    	compatible = "nordic,nrf-spi";
    	status = "disabled";
    	pinctrl-0 = <&spi2_default>;
    	pinctrl-1 = <&spi2_sleep>;
    	pinctrl-names = "default", "sleep";
    };
    
    &qspi {
    	status = "okay";
    	pinctrl-0 = <&qspi_default>;
    	pinctrl-1 = <&qspi_sleep>;
    	pinctrl-names = "default", "sleep";
    	mx25r64: mx25r6435f@0 {
    		compatible = "nordic,qspi-nor";
    		reg = <0>;
    		/* MX25R64 supports only pp and pp4io */
    		writeoc = "pp4io";
    		/* MX25R64 supports all readoc options */
    		readoc = "read4io";
    		sck-frequency = <8000000>;
    		jedec-id = [c2 28 17];
    		sfdp-bfp = [
    			e5 20 f1 ff  ff ff ff 03  44 eb 08 6b  08 3b 04 bb
    			ee ff ff ff  ff ff 00 ff  ff ff 00 ff  0c 20 0f 52
    			10 d8 00 ff  23 72 f5 00  82 ed 04 cc  44 83 68 44
    			30 b0 30 b0  f7 c4 d5 5c  00 be 29 ff  f0 d0 ff ff
    		];
    		size = <67108864>;
    		has-dpd;
    		t-enter-dpd = <10000>;
    		t-exit-dpd = <35000>;
    	};
    };
    
    arduino_spi: &spi3 {
    	status = "okay";
    	cs-gpios = <&arduino_header 16 GPIO_ACTIVE_LOW>; /* D10 */
    	pinctrl-0 = <&spi3_default>;
    	pinctrl-1 = <&spi3_sleep>;
    	pinctrl-names = "default", "sleep";
    };
    
    &ieee802154 {
    	status = "okay";
    };
    
    &flash0 {
    
    	partitions {
    		compatible = "fixed-partitions";
    		#address-cells = <1>;
    		#size-cells = <1>;
    
    		boot_partition: partition@0 {
    			label = "mcuboot";
    			reg = <0x00000000 0x0000C000>;
    		};
    		slot0_partition: partition@c000 {
    			label = "image-0";
    			reg = <0x0000C000 0x00076000>;
    		};
    		slot1_partition: partition@82000 {
    			label = "image-1";
    			reg = <0x00082000 0x00076000>;
    		};
    
    		/*
    		 * The flash starting at 0x000f8000 and ending at
    		 * 0x000fffff is reserved for use by the application.
    		 */
    
    		/*
    		 * Storage partition will be used by FCB/LittleFS/NVS
    		 * if enabled.
    		 */
    		storage_partition: partition@f8000 {
    			label = "storage";
    			reg = <0x000f8000 0x00008000>;
    		};
    	};
    };
    
    zephyr_udc0: &usbd {
    	compatible = "nordic,nrf-usbd";
    	status = "okay";
    };
    

    overlay

    &spi1 {
        status = "okay";
        cs-gpios = < &gpio0 21 GPIO_ACTIVE_HIGH>;
        mx25r645: sdhc-spi-slot@0 {
    		compatible = "zephyr,sdhc-spi-slot";
    		reg = <0x0>;
    		spi-max-frequency = <8000000>;
    		status = "okay";
    		
    		mmc {
    			compatible = "zephyr,sdmmc-disk";
    			status = "okay";
    			
    		};	
    	};
    };
    
    /*
     * Copyright (c) 2023 Nordic Semiconductor ASA
     *
     * SPDX-License-Identifier: Apache-2.0
     */
    
    /* Because FAT FS needs at least 64kiB partition and default
     * storage_partition is 32kiB for that board, we need to reorgatnize
     * partitions to get at least 64KiB.
     * This overlay removes image slot partitions and strips each of 64kiB,
     * and removes the storage partition to add the additional 2*64kiB to
     * it.
     */
    /delete-node/ &slot0_partition;
    /delete-node/ &slot1_partition;
    /delete-node/ &storage_partition;
    
    &flash0 {
    
    	partitions {
    		compatible = "fixed-partitions";
    		#address-cells = <1>;
    		#size-cells = <1>;
    
    		slot0_partition: partition@c000 {
    			reg = <0x0000C000 0x00066000>;
    		};
    		slot1_partition: partition@72000 {
    			reg = <0x00072000 0x00066000>;
    		};
    
    		storage_partition: partition@d8000 {
    			label = "storage";
    			reg = <0x000d8000 0x00028000>;
    		};
    	};
    };
    
    / {
    	msc_disk0 {
    		status="okay";
    		compatible = "zephyr,flash-disk";
    		partition = <&storage_partition>;
    		disk-name = "SD";
    		/* cache-size == page erase size */
    		cache-size = <4096>;
    	};
    };
    
    pinctrl.dtsi
    /*
     * Copyright (c) 2022 Nordic Semiconductor
     * SPDX-License-Identifier: Apache-2.0
     */
    
    &pinctrl {
    	uart0_default: uart0_default {
    		group1 {
    			psels = <NRF_PSEL(UART_TX, 0, 6)>,
    				<NRF_PSEL(UART_RTS, 0, 5)>;
    		};
    		group2 {
    			psels = <NRF_PSEL(UART_RX, 0, 8)>,
    				<NRF_PSEL(UART_CTS, 0, 7)>;
    			bias-pull-up;
    		};
    	};
    
    	uart0_sleep: uart0_sleep {
    		group1 {
    			psels = <NRF_PSEL(UART_TX, 0, 6)>,
    				<NRF_PSEL(UART_RX, 0, 8)>,
    				<NRF_PSEL(UART_RTS, 0, 5)>,
    				<NRF_PSEL(UART_CTS, 0, 7)>;
    			low-power-enable;
    		};
    	};
    
    	uart1_default: uart1_default {
    		group1 {
    			psels = <NRF_PSEL(UART_RX, 1, 1)>;
    			bias-pull-up;
    		};
    		group2 {
    			psels = <NRF_PSEL(UART_TX, 1, 2)>;
    		};
    	};
    
    	uart1_sleep: uart1_sleep {
    		group1 {
    			psels = <NRF_PSEL(UART_RX, 1, 1)>,
    				<NRF_PSEL(UART_TX, 1, 2)>;
    			low-power-enable;
    		};
    	};
    
    	i2c0_default: i2c0_default {
    		group1 {
    			psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
    				<NRF_PSEL(TWIM_SCL, 0, 27)>;
    		};
    	};
    
    	i2c0_sleep: i2c0_sleep {
    		group1 {
    			psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
    				<NRF_PSEL(TWIM_SCL, 0, 27)>;
    			low-power-enable;
    		};
    	};
    
    	i2c1_default: i2c1_default {
    		group1 {
    			psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
    				<NRF_PSEL(TWIM_SCL, 0, 31)>;
    		};
    	};
    
    	i2c1_sleep: i2c1_sleep {
    		group1 {
    			psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
    				<NRF_PSEL(TWIM_SCL, 0, 31)>;
    			low-power-enable;
    		};
    	};
    
    	pwm0_default: pwm0_default {
    		group1 {
    			psels = <NRF_PSEL(PWM_OUT0, 0, 13)>;
    			nordic,invert;
    		};
    	};
    
    	pwm0_sleep: pwm0_sleep {
    		group1 {
    			psels = <NRF_PSEL(PWM_OUT0, 0, 13)>;
    			low-power-enable;
    		};
    	};
    
    	spi0_default: spi0_default {
    		group1 {
    			psels = <NRF_PSEL(SPIM_SCK, 0, 27)>,
    				<NRF_PSEL(SPIM_MOSI, 0, 26)>,
    				<NRF_PSEL(SPIM_MISO, 0, 29)>;
    		};
    	};
    
    	spi0_sleep: spi0_sleep {
    		group1 {
    			psels = <NRF_PSEL(SPIM_SCK, 0, 27)>,
    				<NRF_PSEL(SPIM_MOSI, 0, 26)>,
    				<NRF_PSEL(SPIM_MISO, 0, 29)>;
    			low-power-enable;
    		};
    	};
    
    	spi1_default: spi1_default {
    		group1 {
    			psels = <NRF_PSEL(SPIM_SCK, 0, 31)>,
    				<NRF_PSEL(SPIM_MOSI, 0, 30)>,
    				<NRF_PSEL(SPIM_MISO, 1, 8)>;
    		};
    	};
    
    	spi1_sleep: spi1_sleep {
    		group1 {
    			psels = <NRF_PSEL(SPIM_SCK, 0, 31)>,
    				<NRF_PSEL(SPIM_MOSI, 0, 30)>,
    				<NRF_PSEL(SPIM_MISO, 1, 8)>;
    			low-power-enable;
    		};
    	};
    
    	spi2_default: spi2_default {
    		group1 {
    			psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
    				<NRF_PSEL(SPIM_MOSI, 0, 20)>,
    				<NRF_PSEL(SPIM_MISO, 0, 21)>;
    		};
    	};
    
    	spi2_sleep: spi2_sleep {
    		group1 {
    			psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
    				<NRF_PSEL(SPIM_MOSI, 0, 20)>,
    				<NRF_PSEL(SPIM_MISO, 0, 21)>;
    			low-power-enable;
    		};
    	};
    
    	qspi_default: qspi_default {
    		group1 {
    			psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
    				<NRF_PSEL(QSPI_IO0, 0, 20)>,
    				<NRF_PSEL(QSPI_IO1, 0, 21)>,
    				<NRF_PSEL(QSPI_IO2, 0, 22)>,
    				<NRF_PSEL(QSPI_IO3, 0, 23)>,
    				<NRF_PSEL(QSPI_CSN, 0, 17)>;
    			nordic,drive-mode = <NRF_DRIVE_H0H1>;
    		};
    	};
    
    	qspi_sleep: qspi_sleep {
    		group1 {
    			psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
    				<NRF_PSEL(QSPI_IO0, 0, 20)>,
    				<NRF_PSEL(QSPI_IO1, 0, 21)>,
    				<NRF_PSEL(QSPI_IO2, 0, 22)>,
    				<NRF_PSEL(QSPI_IO3, 0, 23)>;
    			low-power-enable;
    		};
    		group2 {
    			psels = <NRF_PSEL(QSPI_CSN, 0, 17)>;
    			low-power-enable;
    			bias-pull-up;
    		};
    	};
    
    	spi3_default: spi3_default {
    		group1 {
    			psels = <NRF_PSEL(SPIM_SCK, 1, 15)>,
    				<NRF_PSEL(SPIM_MISO, 1, 14)>,
    				<NRF_PSEL(SPIM_MOSI, 1, 13)>;
    		};
    	};
    
    	spi3_sleep: spi3_sleep {
    		group1 {
    			psels = <NRF_PSEL(SPIM_SCK, 1, 15)>,
    				<NRF_PSEL(SPIM_MISO, 1, 14)>,
    				<NRF_PSEL(SPIM_MOSI, 1, 13)>;
    			low-power-enable;
    		};
    	};
    
    };
    

  • Is that zephyr.dts? I can't see that your overlay changes have been applied to that. Did you make sure the overlay was included in the build?

  • it is the default dts file that comes with sdk. After few changes in the overlay file 

    *** Booting nRF Connect SDK v3.5.99-ncs1-1 ***
    [00:00:00.251,678] <err> disk: disk interface already registered!!
    [00:00:00.251,708] <err> flashdisk: Failed to register disk SD error -22

    [00:00:23.376,739] <err> sd: Card never left busy state
    [00:00:23.376,739] <err> sd: Failed to query card OCR
    [00:00:23.376,770] <err> fs: fs mount error (-5)
    Error mounting disk.
    [00:00:23.376,831] <err> fs: fs not mounted (mp == 0x20000000)

    the overlay im using rn

    &spi1 {
        status = "okay";
        cs-gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
    
        sdhc0: sdhc@0 {
                compatible = "zephyr,sdhc-spi-slot";
                reg = <0>;
                status = "okay";
                mmc {
                    compatible = "zephyr,sdmmc-disk";
                    status = "okay";
                };
                spi-max-frequency = <24000000>;
        };
    };
    
    &i2c1 {
        status="disabled";
    };
    
    &i2c0 {
        status="disabled";
    };
    
    
    /delete-node/ &slot0_partition;
    /delete-node/ &slot1_partition;
    /delete-node/ &storage_partition;
    
    &flash0 {
    
    	partitions {
    		compatible = "fixed-partitions";
    		#address-cells = <1>;
    		#size-cells = <1>;
    
    		slot0_partition: partition@c000 {
    			reg = <0x0000C000 0x00066000>;
    		};
    		slot1_partition: partition@72000 {
    			reg = <0x00072000 0x00066000>;
    		};
    
    		storage_partition: partition@d8000 {
    			label = "storage";
    			reg = <0x000d8000 0x00028000>;
    		};
    	};
    };
    
    / {
    	msc_disk0 {
    		status="okay";
    		compatible = "zephyr,flash-disk";
    		partition = <&storage_partition>;
    		disk-name = "SD";
    		/* cache-size == page erase size */
    		cache-size = <4096>;
    	};
    };

    prj.conf

    CONFIG_DISK_ACCESS=y
    CONFIG_LOG=y
    CONFIG_FILE_SYSTEM=y
    CONFIG_FAT_FILESYSTEM_ELM=y
    CONFIG_PRINTK=y
    CONFIG_MAIN_STACK_SIZE=2048
    
    
    # # Copyright (c) 2023 Antmicro <www.antmicro.com>
    # # SPDX-License-Identifier: Apache-2.0
    
    # CONFIG_LOG_MODE_IMMEDIATE=y
    
    # # Enable to allow formatting
    # # CONFIG_FILE_SYSTEM_MKFS=y
    # # CONFIG_TEST_RANDOM_GENERATOR=y
    # CONFIG_DISK_DRIVER_SDMMC=y
    # CONFIG_DISK_ACCESS=y
    
    # # CONFIG_LOG_MODE_IMMEDIATE=y
    # CONFIG_SPI_NRFX=y
    # CONFIG_DISK_DRIVERS=y
    CONFIG_DISK_DRIVER_SDMMC=y
    CONFIG_SDHC=y
    CONFIG_GPIO=y
    CONFIG_SPI=y
    # CONFIG_SD_LOG_LEVEL_DBG=y
    CONFIG_SDHC_LOG_LEVEL_DBG=y
    CONFIG_SDMMC_LOG_LEVEL_DBG=y

    the is a proj_ext.conf in the samples and boards/nrf52840dk_nrf52840.conf, boards/nrf52840dk_nrf52840.overlay, boards/nrf52840dk_nrf52840_qspi.conf, boards/nrf52840dk_nrf52840_qspi.overlay. Im not using any of those in this build. it was getting included automatically but i removed them. Im using the device tree that came with the sdk without making any changes. same for pinctrl. im using v2.6.1 for both toolchain and sdk. I have made no changes to the code at all.

  • Kevin_0987654 said:
    it is the default dts file that comes with sdk.

    Can you also upload build/zephyr/zephyr.dts to see the dts after building?

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