Inquiry on SRAM Retention and Potential Clearing Mechanism on nRF52840

[lancaster]

Dear Nordic Semiconductor Support Team,

I am conducting academic research with the nRF52840 development board, specifically investigating the use of SRAM Physical Unclonable Function (PUF) capabi

During our testing, we noticed that upon power-up, the SRAM contents appear to be completely cleared, with all bits set to zero. This leads us to question whether this behavior is due to a default hardware mechanism in the chip that erases SRAM on power-up or reset.

To clarify this behavior and unde

1. Default Power-Up Behavior: Does the nRF52840 inherently include a hardware-based SRAM clearing or erase process upon power-up or reset? If so, is this behavior configurable, or is it a fixed security feature within the chip that cannot be disabled?

2. Accessing Initial SRAM Pattern: If SRAM clearing is configurable, is there a way to prevent this erase operation so that we can access the SRAM’s natu

3. Impact of Reset Modes: Could different reset methods (such as soft reset versus hard

Please note that this inquiry is solely for academic purposes. Any gui

Thank you very much for your time and help.

Best regards,

Lancaster Liu

[Charlie]

Hi Yuxuan,

Thank you for your explanation. I now have a better understanding after your detailed explanation and reading through this Wikipedia article on Types of Physical Unclonable Functions.

According to the nRF52840 datasheet, there is no automatic hardware mechanism for clearing SRAM during power-on. However, on the firmware side, it depends on the SDK being used.

Currently, we have two SDKs for firmware development: the nRF Connect SDK and the nRF5 SDK. We encourage developers to use the newer nRF Connect SDK for new development projects, as it is based on the open-source Zephyr project.

If your firmware is developed using the nRF Connect SDK/Zephyr, memory behavior can also depend on whether a bootloader is used. For bare-metal firmware, the v2.7.0\zephyr\kernel\init.c file includes the z_bss_zero function for zero-initializing RAM, but you can configure this behavior by setting CONFIG_SKIP_BSS_CLEAR to avoid clearing it.

If a bootloader like MCUboot is used, memory initialization settings can vary. I checked MCUboot documentation and code, and it does not explicitly perform zero-initialization of memory regions.

When no firmware is programmed, you should be able to perform SRAM PUF without interference from the firmware, and you can then compare the results when firmware is present.

Hope this will help you a bit for your research. Let me know if you need more help.

Best regards,

Charlie