i am reading the wav file from SD card and playing in I2S but getting This error can anyone Help with this?
I really appreciate any help you can provide.
######## CODE ############
/*
* Copyright 2023 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/sys/printk.h>
#include <zephyr/drivers/i2s.h>
#include <zephyr/drivers/gpio.h>
#include <string.h>
// flash
#include <zephyr/storage/disk_access.h>
#include <zephyr/fs/fs.h>
#include <zephyr/drivers/flash.h>
#include <zephyr/storage/flash_map.h>
#include <stdio.h>
/*################################# FLASH & SD CARD ###########################################*/
#define TEST_PARTITION slot1_partition
#define TEST_PARTITION_OFFSET FIXED_PARTITION_OFFSET(TEST_PARTITION)
#define TEST_PARTITION_DEVICE FIXED_PARTITION_DEVICE(TEST_PARTITION)
#define TEST_PARTITION_SIZE FIXED_PARTITION_SIZE(TEST_PARTITION)
// #define FLASH_PAGE_SIZE 4096
#if defined(CONFIG_FAT_FILESYSTEM_ELM)
#include <ff.h>
/*
* Note the fatfs library is able to mount only strings inside _VOLUME_STRS
* in ffconf.h
*/
#define DISK_DRIVE_NAME "SD"
#define DISK_MOUNT_PT "/" DISK_DRIVE_NAME ":"
static FATFS fat_fs;
/* mounting info */
static struct fs_mount_t mp = {
.type = FS_FATFS,
.fs_data = &fat_fs,
};
#elif defined(CONFIG_FILE_SYSTEM_EXT2)
#include <zephyr/fs/ext2.h>
#define DISK_DRIVE_NAME "SDMMC"
#define DISK_MOUNT_PT "/ext"
static struct fs_mount_t mp = {
.type = FS_EXT2,
.flags = FS_MOUNT_FLAG_NO_FORMAT,
.storage_dev = (void *)DISK_DRIVE_NAME,
.mnt_point = "/ext",
};
#endif
// LOG_MODULE_REGISTER(main);
// #define MAX_PATH 128
// #define SOME_FILE_NAME "some.dat"
// #define SOME_DIR_NAME "some"
// #define SOME_REQUIRED_LEN MAX(sizeof(SOME_FILE_NAME), sizeof(SOME_DIR_NAME))
static int lsdir(const char *path);
#ifdef CONFIG_FS_SAMPLE_CREATE_SOME_ENTRIES
static bool create_some_entries(const char *base_path)
{
char path[MAX_PATH];
struct fs_file_t file;
int base = strlen(base_path);
fs_file_t_init(&file);
if (base >= (sizeof(path) - SOME_REQUIRED_LEN))
{
LOG_ERR("Not enough concatenation buffer to create file paths");
return false;
}
LOG_INF("Creating some dir entries in %s", base_path);
strncpy(path, base_path, sizeof(path));
path[base++] = '/';
path[base] = 0;
strcat(&path[base], SOME_FILE_NAME);
if (fs_open(&file, path, FS_O_CREATE) != 0)
{
LOG_ERR("Failed to create file %s", path);
return false;
}
fs_close(&file);
path[base] = 0;
strcat(&path[base], SOME_DIR_NAME);
if (fs_mkdir(path) != 0)
{
LOG_ERR("Failed to create dir %s", path);
/* If code gets here, it has at least successes to create the
* file so allow function to return true.
*/
}
return true;
}
#endif
static const char *disk_mount_pt = DISK_MOUNT_PT;
void sd_card_mount()
{
// mux_mode(NRF_OTA);
// k_msleep(100);
// /* raw disk i/o */
do
{
static const char *disk_pdrv = DISK_DRIVE_NAME;
uint64_t memory_size_mb;
uint32_t block_count;
uint32_t block_size;
if (disk_access_init(disk_pdrv) != 0)
{
printk("Storage init ERROR!");
break;
}
if (disk_access_ioctl(disk_pdrv,
DISK_IOCTL_GET_SECTOR_COUNT, &block_count))
{
printk("Unable to get sector count");
break;
}
printk("Block count %u", block_count);
if (disk_access_ioctl(disk_pdrv,
DISK_IOCTL_GET_SECTOR_SIZE, &block_size))
{
printk("Unable to get sector size");
break;
}
printk("Sector size %u\n", block_size);
memory_size_mb = (uint64_t)block_count * block_size;
printk("Memory Size(MB) %u\n", (uint32_t)(memory_size_mb >> 20));
} while (0);
mp.mnt_point = disk_mount_pt;
int res = fs_mount(&mp);
if (res == FR_OK)
{
printk("Disk mounted.\n");
// lsdir(disk_mount_pt);
}
else
{
printk("Error mounting disk.\n");
}
// fs_unmount(&mp);
}
uint8_t buf_word = 0U;
uint32_t offset;
int write_len = 0;
int write_count = 0;
struct fs_file_t filep;
static int lsdir(const char *path)
{
const struct device *flash_dev = TEST_PARTITION_DEVICE;
int res;
struct fs_dir_t dirp;
static struct fs_dirent entry;
int count = 0;
fs_dir_t_init(&dirp);
// struct fs_file_t filep;
// fs_file_t_init(&filep);
struct fs_file_t filep2;
fs_file_t_init(&filep2);
/* Verify fs_opendir() */
res = fs_opendir(&dirp, path);
if (res)
{
printk("Error opening dir %s [%d]\n", path, res);
return res;
}
printk("\nListing dir %s ...\n", path);
for (;;)
{
/* Verify fs_readdir() */
res = fs_readdir(&dirp, &entry);
/* entry.name[0] == 0 means end-of-dir */
if (res || entry.name[0] == 0)
{
break;
}
if (entry.type == FS_DIR_ENTRY_DIR)
{
printk("[DIR ] %s\n", entry.name);
}
else
{
printk("[FILE] %s (size = %zu)\n",
entry.name, entry.size);
// char *file_to_update = "APP_UP~1.BIN";
// if (!strcmp(entry.name, file_to_update))
// {
// printk("Transfering to flash \n");
// char fname1[255];
// snprintf(fname1, sizeof(fname1), "%s/%s", mp.mnt_point, file_to_update);
// res = fs_open(&filep, fname1, FS_O_READ);
// if (res)
// {
// printk("Error opening file %s [%d]\n", fname1, res);
// return res;
// }
// char fname2[255];
// snprintf(fname2, sizeof(fname2), "%s/VALID.BIN", mp.mnt_point);
// fs_unlink(fname2);
// res = fs_open(&filep2, fname2, FS_O_CREATE | FS_O_RDWR);
// if (res)
// {
// printk("Error opening file %s [%d]\n", fname2, res);
// return res;
// }
// int filze_size = (uint32_t *)entry.size;
// printk("file size: %lu \n", filze_size);
// int line_size = 255;
// uint8_t line[line_size];
// if (!device_is_ready(flash_dev))
// {
// printf("Flash device not ready\n");
// return 0;
// }
// // printf("\nTest 1: Flash erase page at 0x%x\n", TEST_PARTITION_OFFSET);
// if (flash_erase(flash_dev, TEST_PARTITION_OFFSET, TEST_PARTITION_SIZE) != 0)
// {
// printf(" Flash erase failed!\n");
// }
// else
// {
// // printf(" Flash erase succeeded!\n");
// }
// // offset = TEST_PARTITION_OFFSET;
// // filze_size = filze_size - line_size;
// // Read file contents line by line
// printf("read:");
// while ((filze_size > 0))
// {
// if (filze_size < line_size)
// {
// fs_read(&filep, line, filze_size);
// write_len = write_count + filze_size;
// filze_size = 0;
// printk("#Line: %d : %s \n", filze_size, line);
// }
// else
// {
// fs_read(&filep, line, line_size);
// // Print the line
// filze_size = filze_size - line_size;
// printk("Line: %d : %s \n", filze_size, line);
// write_len = write_count + line_size;
// }
// int byte_count = 0;
// while (write_count < write_len)
// {
// offset = TEST_PARTITION_OFFSET + write_count;
// if (flash_write(flash_dev, offset, &line[byte_count],
// sizeof(uint8_t)) != 0)
// {
// printf(" Flash write failed!\n");
// return 0;
// }
// if (flash_read(flash_dev, offset, &buf_word,
// sizeof(uint8_t)) != 0)
// {
// printf(" Flash read failed!\n");
// return 0;
// }
// printf("%c", buf_word);
// fs_seek(&filep2, 0, FS_SEEK_END);
// fs_write(&filep2, &buf_word, sizeof(uint8_t));
// if (line[byte_count] == buf_word)
// {
// // printf(" Data read matches data written. Good!\n");
// }
// else
// {
// printf(" Data read does not match data written!\n");
// }
// write_count++;
// byte_count++;
// // printk("WRITE COUNT: %d \n", write_count);
// }
// // printk("WRITE COUNT: %d \n", write_count);
// }
// printf("\n");
// fs_close(&filep);
// fs_close(&filep2);
// printk("END \n");
// boot_request_upgrade(0);
// sys_reboot(0);
// }
}
count++;
}
/* Verify fs_closedir() */
fs_closedir(&dirp);
if (res == 0)
{
res = count;
}
return res;
}
/*##################################################################################################### */
#if DT_NODE_EXISTS(DT_NODELABEL(i2s_rxtx))
#define I2S_RX_NODE DT_NODELABEL(i2s_rxtx)
#define I2S_TX_NODE I2S_RX_NODE
#else
#define I2S_RX_NODE DT_NODELABEL(i2s_rx)
#define I2S_TX_NODE DT_NODELABEL(i2s_tx)
#endif
#define SAMPLE_FREQUENCY 44100
#define SAMPLE_BIT_WIDTH 16
#define BYTES_PER_SAMPLE sizeof(int16_t)
#define NUMBER_OF_CHANNELS 1
/* Such block length provides an echo with the delay of 100 ms. */
#define SAMPLES_PER_BLOCK ((SAMPLE_FREQUENCY / 10) * NUMBER_OF_CHANNELS)
#define INITIAL_BLOCKS 2
#define TIMEOUT 5000
#define SW0_NODE DT_ALIAS(sw0)
#if DT_NODE_HAS_STATUS(SW0_NODE, okay)
static struct gpio_dt_spec sw0_spec = GPIO_DT_SPEC_GET(SW0_NODE, gpios);
#endif
#define SW1_NODE DT_ALIAS(sw1)
#if DT_NODE_HAS_STATUS(SW1_NODE, okay)
static struct gpio_dt_spec sw1_spec = GPIO_DT_SPEC_GET(SW1_NODE, gpios);
#endif
#define BLOCK_SIZE (BYTES_PER_SAMPLE * SAMPLES_PER_BLOCK)
#define BLOCK_COUNT (INITIAL_BLOCKS + 2)
K_MEM_SLAB_DEFINE_STATIC(mem_slab, BLOCK_SIZE, BLOCK_COUNT, 4);
static int16_t echo_block[SAMPLES_PER_BLOCK];
static volatile bool echo_enabled = true;
static K_SEM_DEFINE(toggle_transfer, 1, 1);
#if DT_NODE_HAS_STATUS(SW0_NODE, okay)
static void sw0_handler(const struct device *dev, struct gpio_callback *cb,
uint32_t pins)
{
bool enable = !echo_enabled;
echo_enabled = enable;
printk("Echo %sabled\n", (enable ? "en" : "dis"));
}
#endif
#if DT_NODE_HAS_STATUS(SW1_NODE, okay)
static void sw1_handler(const struct device *dev, struct gpio_callback *cb,
uint32_t pins)
{
k_sem_give(&toggle_transfer);
}
#endif
static bool init_buttons(void)
{
int ret;
#if DT_NODE_HAS_STATUS(SW0_NODE, okay)
static struct gpio_callback sw0_cb_data;
if (!gpio_is_ready_dt(&sw0_spec))
{
printk("%s is not ready\n", sw0_spec.port->name);
return false;
}
ret = gpio_pin_configure_dt(&sw0_spec, GPIO_INPUT);
if (ret < 0)
{
printk("Failed to configure %s pin %d: %d\n",
sw0_spec.port->name, sw0_spec.pin, ret);
return false;
}
ret = gpio_pin_interrupt_configure_dt(&sw0_spec,
GPIO_INT_EDGE_TO_ACTIVE);
if (ret < 0)
{
printk("Failed to configure interrupt on %s pin %d: %d\n",
sw0_spec.port->name, sw0_spec.pin, ret);
return false;
}
gpio_init_callback(&sw0_cb_data, sw0_handler, BIT(sw0_spec.pin));
gpio_add_callback(sw0_spec.port, &sw0_cb_data);
printk("Press \"%s\" to toggle the echo effect\n", sw0_spec.port->name);
#endif
#if DT_NODE_HAS_STATUS(SW1_NODE, okay)
static struct gpio_callback sw1_cb_data;
if (!gpio_is_ready_dt(&sw1_spec))
{
printk("%s is not ready\n", sw1_spec.port->name);
return false;
}
ret = gpio_pin_configure_dt(&sw1_spec, GPIO_INPUT);
if (ret < 0)
{
printk("Failed to configure %s pin %d: %d\n",
sw1_spec.port->name, sw1_spec.pin, ret);
return false;
}
ret = gpio_pin_interrupt_configure_dt(&sw1_spec,
GPIO_INT_EDGE_TO_ACTIVE);
if (ret < 0)
{
printk("Failed to configure interrupt on %s pin %d: %d\n",
sw1_spec.port->name, sw1_spec.pin, ret);
return false;
}
gpio_init_callback(&sw1_cb_data, sw1_handler, BIT(sw1_spec.pin));
gpio_add_callback(sw1_spec.port, &sw1_cb_data);
printk("Press \"%s\" to stop/restart I2S streams\n", sw1_spec.port->name);
#endif
(void)ret;
return true;
}
static void process_block_data(void *mem_block, uint32_t number_of_samples)
{
static bool clear_echo_block;
if (echo_enabled)
{
for (int i = 0; i < number_of_samples; ++i)
{
int16_t *sample = &((int16_t *)mem_block)[i];
*sample += echo_block[i];
echo_block[i] = (*sample) / 2;
}
clear_echo_block = true;
}
else if (clear_echo_block)
{
clear_echo_block = false;
memset(echo_block, 0, sizeof(echo_block));
}
}
static bool configure_streams(const struct device *i2s_dev_rx,
const struct device *i2s_dev_tx,
const struct i2s_config *config)
{
int ret;
if (i2s_dev_rx == i2s_dev_tx)
{
ret = i2s_configure(i2s_dev_rx, I2S_DIR_BOTH, config);
if (ret == 0)
{
return true;
}
/* -ENOSYS means that the RX and TX streams need to be
* configured separately.
*/
if (ret != -ENOSYS)
{
printk("Failed to configure streams: %d\n", ret);
return false;
}
}
ret = i2s_configure(i2s_dev_rx, I2S_DIR_RX, config);
if (ret < 0)
{
printk("Failed to configure RX stream: %d\n", ret);
return false;
}
ret = i2s_configure(i2s_dev_tx, I2S_DIR_TX, config);
if (ret < 0)
{
printk("Failed to configure TX stream: %d\n", ret);
return false;
}
return true;
}
static bool prepare_transfer(const struct device *i2s_dev_rx,
const struct device *i2s_dev_tx)
{
int ret;
for (int i = 0; i < INITIAL_BLOCKS; ++i)
{
void *mem_block;
ret = k_mem_slab_alloc(&mem_slab, &mem_block, K_NO_WAIT);
if (ret < 0)
{
printk("Failed to allocate TX block %d: %d\n", i, ret);
return false;
}
memset(mem_block, 0, BLOCK_SIZE);
ret = i2s_write(i2s_dev_tx, mem_block, BLOCK_SIZE);
if (ret < 0)
{
printk("Failed to write block %d: %d\n", i, ret);
return false;
}
}
return true;
}
static bool trigger_command(const struct device *i2s_dev_rx,
const struct device *i2s_dev_tx,
enum i2s_trigger_cmd cmd)
{
int ret;
if (i2s_dev_rx == i2s_dev_tx)
{
ret = i2s_trigger(i2s_dev_rx, I2S_DIR_BOTH, cmd);
if (ret == 0)
{
return true;
}
/* -ENOSYS means that commands for the RX and TX streams need
* to be triggered separately.
*/
if (ret != -ENOSYS)
{
printk("Failed to trigger command %d: %d\n", cmd, ret);
return false;
}
}
ret = i2s_trigger(i2s_dev_rx, I2S_DIR_RX, cmd);
if (ret < 0)
{
printk("Failed to trigger command %d on RX: %d\n", cmd, ret);
return false;
}
ret = i2s_trigger(i2s_dev_tx, I2S_DIR_TX, cmd);
if (ret < 0)
{
printk("Failed to trigger command %d on TX: %d\n", cmd, ret);
return false;
}
return true;
}
#define SAMPLE_BUFF (BLOCK_SIZE)
int16_t sample[SAMPLE_BUFF];
int16_t sample2[SAMPLE_BUFF];
ssize_t bytes_read;
int byte_count = 0;
static void
fill_buf(int16_t *tx_block)
{
// else
// {
// memset(sample, 0, SAMPLE_BUFF * sizeof(int16_t));
// }
// Copy SAMPLE_BUFF (or BLOCK_SIZE) worth of data from sample to tx_block
memcpy(tx_block, sample, BLOCK_SIZE * sizeof(int16_t));
// for (int i = 0; i < BLOCK_SIZE; i++)
// {
// if (byte_count > SAMPLE_BUFF)
// {
// byte_count = 0;
// printk("Buffer was empty\n");
// // if (bytes_read = fs_read(&filep, &sample, sizeof(sample)))
// // {
// // }
// }
// tx_block[i] = sample[byte_count++];
// // if (i % 5 == 0)
// // {
// // tx_block[i] = 34000;
// // }
// // else
// // {
// // tx_block[i] = -34000;
// // }
// }
}
int main(void)
{
int ret;
const struct device *const i2s_dev_rx = DEVICE_DT_GET(I2S_RX_NODE);
const struct device *const i2s_dev_tx = DEVICE_DT_GET(I2S_TX_NODE);
struct i2s_config config;
printk("I2S echo sample\n");
// #if DT_ON_BUS(DT_NODELABEL(wm8731), i2c)
// if (!init_wm8731_i2c()) {
// return 0;
// }
// #endif
if (!init_buttons())
{
return 0;
}
if (!device_is_ready(i2s_dev_rx))
{
printk("%s is not ready\n", i2s_dev_rx->name);
return 0;
}
if (i2s_dev_rx != i2s_dev_tx && !device_is_ready(i2s_dev_tx))
{
printk("%s is not ready\n", i2s_dev_tx->name);
return 0;
}
config.word_size = SAMPLE_BIT_WIDTH;
config.channels = NUMBER_OF_CHANNELS;
config.format = I2S_FMT_DATA_FORMAT_LEFT_JUSTIFIED;
config.options = I2S_OPT_BIT_CLK_MASTER | I2S_OPT_FRAME_CLK_MASTER;
config.frame_clk_freq = SAMPLE_FREQUENCY;
config.mem_slab = &mem_slab;
config.block_size = BLOCK_SIZE;
config.timeout = SYS_FOREVER_MS;
// if (!configure_streams(i2s_dev_rx, i2s_dev_tx, &config))
// {
// return 0;
// }
sd_card_mount();
lsdir(disk_mount_pt);
fs_file_t_init(&filep);
char *file_to_update = "MONO.WAV";
char fname1[255];
snprintf(fname1, sizeof(fname1), "%s/%s", mp.mnt_point, file_to_update);
int res = fs_open(&filep, fname1, FS_O_READ);
if (res)
{
printk("Error opening file %s [%d]\n", fname1, res);
return res;
}
else
{
printk("File opened : %s\n", fname1);
}
// Skip the WAV header
res = fs_seek(&filep, 44 + byte_count, FS_SEEK_SET);
if (res < 0)
{
printk("Failed to seek past header: %d\n", res);
fs_close(&filep);
return;
}
// fs_close(&filep);
// void *mem_block;
// void *tx_block[INITIAL_BLOCKS];
// uint32_t tx_idx;
// int ret;
// while (1)
// {
// /* Prepare all TX blocks */
// for (tx_idx = 0; tx_idx < INITIAL_BLOCKS; tx_idx++)
// {
// ret = k_mem_slab_alloc(&mem_slab, &tx_block[tx_idx],
// K_FOREVER);
// if (ret < 0)
// {
// printf("Failed to allocate TX block\n");
// return ret;
// }
// fill_buf((uint16_t *)tx_block[tx_idx]);
// }
// tx_idx = 0;
// /* Send first block */
// while (i2s_write(i2s_dev_tx, tx_block[tx_idx], BLOCK_SIZE))
// {
// // if (ret < 0)
// // {
// printf("Could not write TX buffer 1 %d\n", tx_idx);
// // return ret;
// // }
// }
// tx_idx++;
// /* Trigger the I2S transmission */
// ret = i2s_trigger(i2s_dev_tx, I2S_DIR_TX, I2S_TRIGGER_START);
// if (ret < 0)
// {
// printf("Could not trigger I2S tx\n");
// return ret;
// }
// for (; tx_idx < INITIAL_BLOCKS;)
// {
// ret = i2s_write(i2s_dev_tx, tx_block[tx_idx++], BLOCK_SIZE);
// if (ret < 0)
// {
// printf("Could not write TX buffer 2 %d\n", tx_idx);
// return ret;
// }
// }
// /* Drain TX queue */
// ret = i2s_trigger(i2s_dev_tx, I2S_DIR_TX, I2S_TRIGGER_DRAIN);
// if (ret < 0)
// {
// printf("Could not trigger I2S tx\n");
// return ret;
// }
// printf("All I2S blocks written\n");
// // k_msleep(180);
// }
if (bytes_read = fs_read(&filep, &sample, sizeof(sample)))
{
byte_count = byte_count + sizeof(sample);
}
ret = i2s_configure(i2s_dev_tx, I2S_DIR_TX, &config);
if (ret < 0)
{
printk("Failed to configure TX stream: %d\n", ret);
return false;
}
if (!prepare_transfer(i2s_dev_rx, i2s_dev_tx))
{
return 0;
}
ret = i2s_trigger(i2s_dev_tx, I2S_DIR_TX, I2S_TRIGGER_START);
if (ret < 0)
{
printf("Could not trigger I2S tx START\n");
return ret;
}
// if (!trigger_command(i2s_dev_rx, i2s_dev_tx,
// I2S_TRIGGER_START))
// {
// return 0;
// }
// if (!trigger_command(i2s_dev_rx, i2s_dev_tx,
// I2S_TRIGGER_DRAIN))
// {
// return 0;
// }
printk("Streams started : %u\n", (uint32_t *)BLOCK_SIZE);
// printk("Init a while\n");
while (1)
{
/* Prepare all TX blocks */
// if (bytes_read = fs_read(&filep, &sample, sizeof(sample)))
// {
// }
// else
// {
// memset(sample, 0, SAMPLE_BUFF * sizeof(int16_t));
// }
void *tx_block = NULL; // explicitly initialize to NULL (good practice)
uint32_t tx_idx;
int ret;
ret = k_mem_slab_alloc(&mem_slab, &tx_block,
K_FOREVER);
if (ret < 0)
{
printf("Failed to allocate TX block\n");
return ret;
}
memset(tx_block, 0, BLOCK_SIZE);
// if (bytes_read = fs_read(&filep, &sample, sizeof(sample)))
// {
// }
// else
// {
// memset(sample, 0, SAMPLE_BUFF * sizeof(int16_t));
// }
memcpy(tx_block, sample, BLOCK_SIZE * sizeof(int16_t));
// fill_buf((uint16_t *)tx_block);
/* Send first block */
printf("Going in\n");
if (i2s_write(i2s_dev_tx, tx_block, BLOCK_SIZE))
{
// if (ret < 0)
// {
printf("Could not write TX buffer 1 %d\n", tx_idx);
memset(tx_block, 0, BLOCK_SIZE);
// return ret;
// }
}
printf("Out form write\n");
// tx_idx++;
/* Trigger the I2S transmission */
// ret = i2s_trigger(i2s_dev_tx, I2S_DIR_TX, I2S_TRIGGER_START);
// if (ret < 0)
// {
// printf("Could not trigger I2S tx START\n");
// return ret;
// }
// for (; tx_idx < INITIAL_BLOCKS;)
// {
// ret = i2s_write(i2s_dev_tx, tx_block[tx_idx++], BLOCK_SIZE);
// if (ret < 0)
// {
// printf("Could not write TX buffer 2 %d\n", tx_idx);
// return ret;
// }
// }
/* Drain TX queue */
// ret = i2s_trigger(i2s_dev_tx, I2S_DIR_TX, I2S_TRIGGER_DRAIN);
// if (ret < 0)
// {
// printf("Could not trigger I2S tx DRAIN\n");
// return ret;
// }
// ret = i2s_trigger(i2s_dev_tx, I2S_DIR_TX, I2S_TRIGGER_PREPARE);
// if (ret < 0)
// {
// printf("Could not trigger I2S tx PREPARE\n");
// return ret;
// }
printf("All I2S blocks written\n");
// k_msleep(80);
// res = fs_open(&filep, fname1, FS_O_READ);
// if (res)
// {
// printk("Error opening file %s [%d]\n", fname1, res);
// return res;
// }
// else
// {
// printk("File opened : %s\n", fname1);
// }
// Skip the WAV header
// res = fs_seek(&filep, 44 + byte_count, FS_SEEK_SET);
// if (res < 0)
// {
// printk("Failed to seek past header: %d\n", res);
// fs_close(&filep);
// return;
// }
printf("Goping to read\n");
if ((bytes_read = fs_read(&filep, &sample, sizeof(sample))) < 0)
{
printf("Error reading file: %d\n", bytes_read);
// Handle the error or break out of the loop
}
printf("Out from read\n");
k_msleep(2000);
// fs_close(&filep);
}
// ret = i2s_trigger(i2s_dev_tx, I2S_DIR_TX, I2S_TRIGGER_STOP);
// if (ret < 0)
// {
// printf("Could not trigger I2S tx STOP\n");
// // return ret;
// }
// }
// if (bytes_read = fs_read(&filep, &sample, sizeof(sample)))
// {
// }
// else
// {
// memset(sample, 0, SAMPLE_BUFF * sizeof(int16_t));
// }
// void *mem_block;
// int ret;
// ret = k_mem_slab_alloc(&mem_slab, &mem_block, K_NO_WAIT);
// // fill_buf((uint16_t *)mem_block);
// // printk("Fil buffer!\n");
// memset(mem_block, 0, BLOCK_SIZE);
// ret = i2s_write(i2s_dev_tx, mem_block, BLOCK_SIZE);
// if (ret < 0)
// {
// printk("Failed to write block %d: %d\n", ret);
// return false;
// }
// ret = i2s_trigger(i2s_dev_tx, I2S_DIR_TX, I2S_TRIGGER_START);
// if (ret < 0)
// {
// printk("Failed to trigger START on TX: %d\n", ret);
// return false;
// }
// ret = i2s_trigger(i2s_dev_tx, I2S_DIR_TX, I2S_TRIGGER_DRAIN);
// if (ret < 0)
// {
// printk("Failed to trigger DRAIN on TX: %d\n", ret);
// return false;
// }
printk("Streams stopped\n");
}
##### ERROR #####
*** Booting nRF Connect SDK v3.5.99-ncs1 ***<\r><\n> Attempting to boot slot 0.<\r><\r><\n> Attempting to boot from address 0x9200.<\r><\n> <\r>Verifying signature against key 0.<\r><\n> <\r>Hash: 0x70...81<\r><\r><\n> Firmware signature verified.<\r><\n> <\r>Firmware version 1<\r><\r><\n> Setting monotonic counter (version: 1, slot: 0)<\r><\r><\n> Booting (0x9200).<\r><\r>*** Booting nRF Connect SDK v3.5.99-ncs1 ***<\r><\n> I: Starting bootloader<\r><\n> I: Primary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3<\r><\n> I: Secondary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3<\r><\n> I: Boot source: none<\r><\n> I: Image index: 0, Swap type: none<\r><\n> I: Primary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3<\r><\n> I: Secondary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3<\r><\n> I: Boot source: none<\r><\n> I: Image index: 1, Swap type: none<\r><\n> I: Bootloader chainload address offset: 0x23000<\r><\n> I: Jumping to the first image slot<\r>?*** Booting nRF Connect SDK v3.5.99-ncs1 ***<\r><\n> I2S echo sample<\r><\n> Press "gpio@50000000" to toggle the echo effect<\r><\n> [00:00:00.034,484] <27>[0m<inf> sd: Maximum SD clock is under 25MHz, using clock of 8000000Hz<27>[0m<\r><\n> Block count 30535680Sector size 512<\r><\n> Memory Size(MB) 14910<\r><\n> Disk mounted.<\r><\n> <\r><\n> Listing dir /SD: ...<\r><\n> [DIR ] SYSTEM~1<\r><\n> [DIR ] DWIN_SET<\r><\n> [DIR ] DWIN_S~1<\r><\n> [DIR ] DWIN_S~2<\r><\n> [DIR ] DWIN_S~3<\r><\n> [FILE] APP_UP~1.BIN (size = 249376)<\r><\n> [FILE] TONE.WAV (size = 1048558)<\r><\n> [FILE] OTA_DA~1.TXT (size = 62)<\r><\n> [FILE] STEREO.WAV (size = 2035024)<\r><\n> [FILE] MONO.WAV (size = 1017824)<\r><\n> File opened : /SD:/MONO.WAV<\r><\n> [00:00:00.213,836] <27>[0m<inf> i2s_nrfx: I2S MCK frequency: 1391304, actual PCM rate: 43478<27>[0m<\r><\n> Streams started : 8820<\r><\n> Going in<\r><\n> Out form write<\r><\n> All I2S blocks written<\r><\n> Goping to read<\r><\n> Out from read<\r><\n> [00:00:00.529,693] <27>[1;31m<err> i2s_nrfx: Next buffers not supplied on time<27>[0m<\r><\n> Going in<\r><\n> [00:00:02.340,484] <27>[1;31m<err> i2s_nrfx: Cannot write in state: 4<27>[0m<\r><\n> Could not write TX buffer 1 0<\r><\n> Out form write<\r><\n> All I2S blocks written<\r><\n> Goping to read<\r><\n> Out from read<\r><\n> Going in<\r><\n> [00:00:04.464,233] <27>[1;31m<err> i2s_nrfx: Cannot write in state: 4<27>[0m<\r><\n> Could not write TX buffer 1 0<\r><\n> Out form write<\r><\n> All I2S blocks written<\r><\n> Goping to read<\r><\n> Out from read<\r><\n> [00:00:06.581,909] <27>[1;31m<err> os: ***** BUS FAULT *****<27>[0m<\r><\n> [00:00:06.587,677] <27>[1;31m<err> os: Precise data bus error<27>[0m<\r><\n> [00:00:06.608,795] <27>[1;31m<err> os: BFAR Address: 0xf7ee00f8<27>[0m<\r><\n> [00:00:06.630,126] <27>[1;31m<err> os: r0/a1: 0x2000053c r1/a2: 0x20008768 r2/a3: 0x00000000<27>[0m<\r><\n> [00:00:06.654,388] <27>[1;31m<err> os: r3/a4: 0xf7ee00f8 r12/ip: 0x00000000 r14/lr: 0x0002d99b<27>[0m<\r><\n> [00:00:06.678,588] <27>[1;31m<err> os: xpsr: 0x01000000<27>[0m<\r><\n> [00:00:06.699,218] <27>[1;31m<err> os: s[ 0]: 0x20000534 s[ 1]: 0x20008768 s[ 2]: 0xffffffff s[ 3]: 0x00000000<27>[0m<\r><\n> [00:00:06.725,341] <27>[1;31m<err> os: s[ 4]: 0x20000894 s[ 5]: 0x00034814 s[ 6]: 0x200014c0 s[ 7]: 0x20000534<27>[0m<\r><\n> [00:00:06.751,464] <27>[1;31m<err> os: s[ 8]: 0x00035753 s[ 9]: 0x00023a9d s[10]: 0x00035645 s[11]: 0x00000000<27>[0m<\r><\n> [00:00:06.777,557] <27>[1;31m<err> os: s[12]: 0xf7ee00f8 s[13]: 0x00030110 s[14]: 0x0000ac44 s[15]: 0x20000534<27>[0m<\r><\n> [00:00:06.803,649] <27>[1;31m<err> os: fpscr: 0x00002274<27>[0m<\r><\n> [00:00:06.824,249] <27>[1;31m<err> os: Faulting instruction address (r15/pc): 0x0002d9a0<27>[0m<\r><\n> [00:00:06.847,656] <27>[1;31m<err> os: >>> ZEPHYR FATAL ERROR 25: Unknown error on CPU 0<27>[0m<\r><\n> [00:00:06.871,032] <27>[1;31m<err> os: Current thread: 0x200006b0 (unknown)<27>[0m<\r><\n> [00:00:06.913,391] <27>[1;31m<err> fatal_error: Resetting system<27>[0m<\r>*** Booting nRF Connect SDK v3.5.99-ncs1 ***<\r><\n> Attempting to boot slot 0.<\r><\r><\n> Attempting to boot from address 0x9200.<\r><\n> <\r>Verifying signature against key 0.<\r><\n> <\r>Hash: 0x70...81<\r><\r><\n> Firmware signature verified.<\r><\n> <\r>Firmware version 1<\r><\r><\n> Booting (0x9200).<\r><\r>*** Booting nRF Connect SDK v3.5.99-ncs1 ***<\r><\n> I: Starting bootloader<\r><\n> I: Primary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3<\r><\n> I: Secondary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3<\r><\n> I: Boot source: none<\r><\n> I: Image index: 0, Swap type: none<\r><\n> I: Primary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3<\r><\n> I: Secondary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3<\r><\n> I: Boot source: none<\r><\n> I: Image index: 1, Swap type: none<\r><\n> I: Bootloader chainload address offset: 0x23000<\r><\n> I: Jumping to the first image slot<\r>?*** Booting nRF Connect SDK v3.5.99-ncs1 ***<\r><\n> I2S echo sample<\r><\n> Press "gpio@50000000" to toggle the echo effect<\r><\n> [00:00:00.034,484] <27>[0m<inf> sd: Maximum SD clock is under 25MHz, using clock of 8000000Hz<27>[0m<\r><\n> Block count 30535680Sector size 512<\r><\n> Memory Size(MB) 14910<\r><\n> Disk mounted.<\r><\n> <\r><\n> Listing dir /SD: ...<\r><\n> [DIR ] SYSTEM~1<\r><\n> [DIR ] DWIN_SET<\r><\n> [DIR ] DWIN_S~1<\r><\n> [DIR ] DWIN_S~2<\r><\n> [DIR ] DWIN_S~3<\r><\n> [FILE] APP_UP~1.BIN (size = 249376)<\r><\n> [FILE] TONE.WAV (size = 1048558)<\r><\n> [FILE] OTA_DA~1.TXT (size = 62)<\r><\n> [FILE] STEREO.WAV (size = 2035024)<\r><\n> [FILE] MONO.WAV (size = 1017824)<\r><\n> File opened : /SD:/MONO.WAV<\r><\n> [00:00:00.213,867] <27>[0m<inf> i2s_nrfx: I2S MCK frequency: 1391304, actual PCM rate: 43478<27>[0m<\r><\n> Streams started : 8820<\r><\n> Going in<\r><\n> Out form write<\r><\n> All I2S blocks written<\r><\n> Goping to read<\r><\n> Out from read<\r><\n> [00:00:00.529,724] <27>[1;31m<err> i2s_nrfx: Next buffers not supplied on time<27>[0m<\r><\n>