Why does the spi-nor flash on nRF54L15-DK is defined in the generic nrf54l15_cpuapp_common.dtsi file ?

[Elsys-Antoine]

Hello

I am working with the nrf54l15 soc (sdk 2.8.0).

I have noticed that a component "mx25r6435f" is defined in the generic nrf54l15_cpuapp_common.dtsi file.

With some research, I have confirmed that component is an external spi-nor flash on the nrf54l15DK.

Is there a specific reason that component is defined in this file ?
Can I disable it to use SPIM20 peripheral with the same pins as "mx25r6435f" ?

Thanks for your answer

[Einar Thorsrud]

Hi,

Is there a specific reason that component is defined in this file ?

I am not sure, can you elaborate on why you think it should be somewhere else (and if so, where?). That said, this file is not generic for the nRF54L15 CPUAPP, but for the cpuapp on the nRF54L15 DK, which is used when developing for targets that are L15, L10 or L05 and is common. So this makes sense in this specific board.

Can I disable it to use SPIM20 peripheral with the same pins as "mx25r6435f" ?

Yes, but note that SPIM 2x should ideally be used with GPIO port P1 (see Configuration and Cross power-domain notes).

[Elsys-Antoine]

Hi

Thank you for your answer.
I would have defined the external flash in the nrf54l15dk_nrf54l15_cpuapp.dts file.

I will disable the external flash and check further if I need to use SPIM0x or SPIM2x for my usecase

[Einar Thorsrud]

Elsys-Antoine said:

I would have defined the external flash in the nrf54l15dk_nrf54l15_cpuapp.dts file.

I see, for a custom board that makes sense as they are typically used for one thing. The nRF54L15 DK is a speical case as it is also used to develop for nRF54L10 and nRF54L05, and while it is the same physical HW, there are also differences (as the "emulated" SoCs for L10 and L05 have less memory.)