Hello,
I am currently using two hardware:
1. nRF7002DK PCA10143
2. Fanstel WT02C40C that has the nRF5340 and nRF7002 pair. Here is the latest manual of this module.
In both scenarios, I have loaded the same firmware that enables an AP connection and a TWT session of 4.5 seconds. The main issue is related to the power consumption drawn by the entire nRF5340 and nRF7002 pair under different power supply cases. I am fully interested in the power consumption between sleep-time intervals between TWT pings.
Some conditions of the firmware:
1. DC/DC mode on the internal regulators (VREGMAIN, VREGH, VREGRADIO) are enabled.
2. CONFIG_SERIAL=n and CONFIG_LOG=n are applied to avoid high power consumption due to logging.
3. CONFIG_BOARD_ENABLE_CPUNET=n because the firmware does not use the Network Core.
4. CONFIG_NRF_WIFI_LOW_POWER=y to ensure low power modes on nRF7002 chip
5. CONFIG_SOC_ENABLE_LFXO=y; CONFIG_SOC_LFXO_CAP_INT_7PF=y; CONFIG_SOC_HFXO_CAP_INTERNAL=y; CONFIG_SOC_HFXO_CAP_INT_VALUE_X2=25 when using the Fanstel module. I tested the consumption not considering those CONFIG tags, but no changes are achieved.
6. CONFIG_BT=n, CONFIG_PM_DEVICE=y to ensure more directives for low power consumption.
Let me show you the following results. Each result has a raw diagram of the PPK connection in order to show the measurement connection:
1. Test 1: Firmware loaded in the nRF7002DK that uses VDD at 1.8V (for the nRF5340) and VBAT (for the nRF7002 chip) at 3.3V. Here are presented separate consumption graphics with the PPK2 following the instructions of the Current Measurements on nRF7002DK.
1.1. Separate consumption cases: Measurement of the current consumption of each chip.
For the nRF5340 device:
For the nRF7002 chip:
Adding the values at sleep mode, we can estimate a total consumption of the nRF5240 and nRF7002 pair as: 173.40uA + 18.34 uA = 191.74uA
Result 191.74uA
1.2. Complete Dev. Kit consumption: Measurement of the entire power consumption of the nRF7002DK --> Here, as the Dev Kit has other components that are connected to the power supply, (regulators, level detectors and so on, based on the PCA10143 Power supply schematic) it is expected that the consumption could increase.
Result: 1.8mA
2. Test 2: Fanstel WT02C40C supplying the internal nRF5340 at 3.3V (High Voltage Mode with VDD disconnected and VDDH connected) and the nRF7002 at 3.3V. This schema follows one of the ways to supply the nRF5230 and nRF7002 pair shown here for the High Voltage Mode. The Fanstel module includes the external crystals too:
Result: 4.51 mA.
3. Test 3: Fanstel WT02C40C supplying the nRf5340 at 1.8V (both VDD and VDDH) and nRF7002 at 3V3 (VBat). It follows the Normal Voltage Mode on the nRF7002 reference shown here:
There are two cases:
3.1. When using a weak connection of the 1.8V regulator shown in the diagrams (using Dupont cables and protoboard) the results are the following after moving the connections or changing the cables:
Result: 337.64 uA
3.2. When soldering properly the regulator to the Fanstel module with suitable connection of the regulator
Result: 1.7mA
The main objective of this is to achieve the lowest power consumption of both the nRF5340 and nRF7002 devices. Since the power changes are applied on VDD and VDDH (related to the nRF5340), I suppose that the higher power consumption is entirely on the nRF5340 device. Looking its reference manual, I can see that when the QSPI is enabled in Idle mode (That could be the mode that is applied when the nRF7002 is in sleep mode in the times between TWT intervals), the consumption is less than in all cases shown here (the reference manual assumes a power supply on VDD and VDDH of 3V in Normal Voltage Mode when using the QSPI as shown here)
Could you help me to have a more insight about some missing configuration on the nRF5340, or any other support at hardware level I need to consider? The Fanstel module follows all the powering recommendations on the nRF5340-nRF7002 pair, similar as it is implemented on the nRF7002DK.
