Working DeviceTree configuration on v2.5.2 fails for v2.6 and later SDK versions

We are using a custom board design.  I created a custom board configuration when using the v2.5 SDK.  In this configuration, we have the UART0 pins configured such that RXD is configured to use GPIO P0.09 and TXD is configured to use GPIO P0.10.

When I build the code that is designed to work with the Nordic SDK v2.5.2, the code builds and when downloaded to our custom board, the UART functions properly (both transmit and receive working as expected).  However, when I build the code that was modified to work with Nordic SDK v2.6.2, the UART (UART0) does not work.  In the debugger, I see that the UART ERRORSRC (register at 0x40002480) has a value of 0x0000000C.  From the product specification, this indicates a framing error and break condition.  Reading the description of the Break condition, it would seem that the RXD input is being held low.

We have build code that works with SDK v2.7.0 and v2.8.0 and both of these versions exhibit the same failure as the v2.6.2 SDK code.

The interesting behavior occurs when I do the following:

1). I build the v2.5.2 SDK code and flash it to our custom board using the "Erase and Flash to Board" programming function.  This code has proper UART0 functionality.

2). I then build the v2.6.2 SDK code (or the v2.8.0 SDK code for that matter) and then flash it to our custom board using the "Flash to Board" programming function.  When booting this configuration, the UART0 functions properly as well.  There are no errors reported in the UART's ERRORSRC register.

3). I if take the v2.6.2 (or the v2.8.0) SDK code then flash it to our custom board using the "Erase and Flash to Board" programming function, then the UART0 does not work properly -- due to the framing and break error conditions.

What sections of flash are programmed with the "Erase and Flash to Board" function that are not programmed with the "Flash to Board" function that could account for this difference?  How can we configure our product so that UART0 will work without having to program older code first (step 1 above)?

I have tried the AI search suggestion of adding these two lines to the prj.conf with no effect:

CONFIG_TFM_SECURE_UART=n
CONFIG_TFM_LOG_LEVEL_SILENCE=y

I have also tried modifying the device tree configuration on v2.6.2 so the resulting zephyr.dts file matches (as closely as I can possibly get it) the v2.5.2 zephyr.dts file.

I have looked at all the PSEL register values to make sure that no other configuration was also selecting the P0.09 or P0.10 GPIO.

Any thoughts on what could be going on here?

Thanks,

Gene Roylance
PuzL Labs

Parents
  • Hi Gene 

    I will be looking into your case. Just a few question to start with:

    1. Have you tried to probe the pins with a logic analyzer? 

    2. Can you replicate this on a DK? 

    3. Can you post the overlay so I can have a look at it and prj.conf?

    Regards

    Runar

  • Runar,

    1.  I have not probed the pins with a logic analyzer.  It is not easy for me to do that.  In addition, since I can literally load one set of code on the hardware and have it work, while a different version on the same hardware does not work, I am struggling to see the value in this experiment.

    2.  I would have to see how difficult it would be to connect a RS232 connection to the nrf52840dk board, I don't know how I could test this on the DK board.

    3.  Attached is the overlay and prj.conf files.

    prj.conf:

    CONFIG_ASSERT_NO_FILE_INFO=n
    CONFIG_RESET_ON_FATAL_ERROR=n
    CONFIG_ASSERT_VERBOSE=y
    CONFIG_THREAD_NAME=y
    CONFIG_BOOT_BANNER=y
    CONFIG_PRINTK=y
    CONFIG_PRINTK_SYNC=y
    CONFIG_CONSOLE=y
    CONFIG_UART_CONSOLE=y
    CONFIG_RTT_CONSOLE=n
    CONFIG_SHELL=y
    CONFIG_OPENTHREAD_SHELL=y
    CONFIG_CHIP_LIB_SHELL=y
    CONFIG_SERIAL=y
    CONFIG_USE_SEGGER_RTT=n
    CONFIG_SHELL_BACKENDS=y
    CONFIG_SHELL_BACKEND_SERIAL=y
    CONFIG_SHELL_BACKEND_RTT=n
    CONFIG_LOG=n
    CONFIG_LOG_BACKEND_UART=n
    CONFIG_LOG_BACKEND_RTT=n
    #CONFIG_LOG_BACKEND_RTT_BUFFER=1
    CONFIG_LOG_MODE_MINIMAL=n
    #CONFIG_NFCT_PINS_AS_GPIOS=y # deprecated as of SDK v2.6.0
    CONFIG_PM_DEVICE=y
    CONFIG_I2C=y
    CONFIG_ADC=y
    CONFIG_PWM=y
    CONFIG_WATCHDOG=y
    CONFIG_WDT_DISABLE_AT_BOOT=y
    CONFIG_RAM_POWER_DOWN_LIBRARY=y

    # Start ** Additions for the PuzL ExtFlash part.
    CONFIG_FLASH=y
    CONFIG_SPI=y
    CONFIG_NORDIC_QSPI_NOR=y
    CONFIG_NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096
    CONFIG_OPENTHREAD_NORDIC_LIBRARY_MTD=y
    CONFIG_MPU_ALLOW_FLASH_WRITE=y
    # End ** Additions for the PuzL ExtFlash part.

    CONFIG_NET_L2_OPENTHREAD=y
    CONFIG_OPENTHREAD_MTD=y
    CONFIG_OPENTHREAD_MTD_SED=y
    CONFIG_CHIP=y
    CONFIG_CHIP_ENABLE_ICD_SUPPORT=y
    CONFIG_CHIP_ICD_IDLE_MODE_DURATION=120
    CONFIG_CHIP_ICD_ACTIVE_MODE_DURATION=300
    CONFIG_CHIP_ICD_SLOW_POLL_INTERVAL=1000
    CONFIG_CHIP_ICD_FAST_POLLING_INTERVAL=200

    CONFIG_CHIP_ENABLE_PAIRING_AUTOSTART=n
    CONFIG_CHIP_PROJECT_CONFIG="src/chip_project_config.h"
    CONFIG_CHIP_DEVICE_TYPE=67
    CONFIG_STD_CPP17=y
    CONFIG_DK_LIBRARY=n
    CONFIG_BT_DEVICE_NAME="PuzlMatter"

    CONFIG_THREAD_NAME=y
    CONFIG_MPU_STACK_GUARD=y
    CONFIG_CHIP_NFC_COMMISSIONING=n
    CONFIG_CHIP_FACTORY_DATA=y
    CONFIG_CHIP_FACTORY_DATA_BUILD=y

    # ***************************

    overlay file:

    /*
     * Copyright (c) 2021-2022 Nordic Semiconductor ASA
     *
     * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
     */

    // For more help, browse the DeviceTree documentation at docs.zephyrproject.org/.../index.html
    // You can also visit the nRF DeviceTree extension documentation at nrfconnect.github.io/.../nrfdevicetree.html

    / {
            /*
            * In some default configurations within the nRF Connect SDK,
            * e.g. on nRF52840, the chosen zephyr,entropy node is &cryptocell.
            * This devicetree overlay ensures that default is overridden wherever it
            * is set, as this application uses the RNG node for entropy exclusively.
            */
            chosen {
                    zephyr,entropy = &rng;
            };
    };

    // The 0x100 bytes of the PuzL MfgBlock starts at 0x20000000. To reserve it for Mfg we'll tell the
    // linker that it can put code related items starting at 0x20000100. This conflicts what is called
    // out in <SDK>/zephyr/dts/arm/nordic/nrf52840.dtsi but does take precedence.
    // Note: or alternatively specify with CONFIG_SRAM_... settings in prj.conf file.
    &sram0 {
        reg = < 0x20000100 (DT_SIZE_K(256)-0x100)>; /* PuzL: override stock 0x20000000 setting. */
    };

    /* PuzL Persistent Storage (Internal Flash).
            Note: puzl_partition is defined in
                      ./configuration/nrf52840dk_nrf52840/pm_static_dfu.yml
    */

    // PuzL Labs Quad Flash (External Flash).
    &qspi_default {
            group1 {
                    psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
                            <NRF_PSEL(QSPI_IO0, 0, 20)>,
                            <NRF_PSEL(QSPI_IO1, 0, 22)>,
                            <NRF_PSEL(QSPI_IO2, 0, 23)>,
                            <NRF_PSEL(QSPI_IO3, 0, 21)>,
                            <NRF_PSEL(QSPI_CSN, 0, 17)>;
                    nordic,drive-mode = <NRF_DRIVE_H0H1>;
            };
    };

    &qspi_sleep {
            group1 {
                    psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
                            <NRF_PSEL(QSPI_IO0, 0, 20)>,
                            <NRF_PSEL(QSPI_IO1, 0, 22)>,
                            <NRF_PSEL(QSPI_IO2, 0, 23)>,
                            <NRF_PSEL(QSPI_IO3, 0, 21)>;
                    low-power-enable;
            };
            group2 {
                    psels = <NRF_PSEL(QSPI_CSN, 0, 17)>;
                    low-power-enable;
                    bias-pull-up;
            };
    };

    / {
            chosen {
                    nordic,pm-ext-flash = &mx25r64;
            };
    };

    // PuzL Labs Button and LED
    &button0 {
            gpios = <&gpio0 30 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
    };
    &led0 {
            gpios = <&gpio0 14 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN | (1 << 8))>; //(1<<8) sets high drive stength.
    };

    &button1 {
            gpios = <&gpio0 2 (GPIO_ACTIVE_HIGH )>; //| GPIO_PULL_DOWN)>; do not set pull-dwn as default so gpio_pin_configure_dt can config
    };

    // PuzL UART
    &uart0_default {
            group1 {
                    psels = <NRF_PSEL(UART_TX, 0, 10)>;
            };
            group2 {
                    psels = <NRF_PSEL(UART_RX, 0, 9)>;
            };
    };

    &uart0_sleep {
            group1 {
                    psels = <NRF_PSEL(UART_TX, 0, 10)>,
                            <NRF_PSEL(UART_RX, 0, 9)>;
            };
    };

    // PuzL ADC
    / {
            zephyr,user {
                    io-channels = <&adc 4>,<&adc 7>;
            };
    };

    &adc {
            #address-cells = <1>;
            #size-cells = <0>;

            channel@4 {
                    reg = <4>;
                    zephyr,gain = "ADC_GAIN_1_4"; // gain=1/4 VDD/4/(1/4)=VDD FS
                    zephyr,reference = "ADC_REF_VDD_1_4"; // VDD/4       
                    zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
                    zephyr,input-positive = <NRF_SAADC_AIN4>; // P0.28
                    zephyr,resolution = <12>;
            };
            channel@7 {
                    reg = <7>;
                    zephyr,gain = "ADC_GAIN_1_6"; // gain=1/6 .6/(1/6)=3.6v FS
                    zephyr,reference = "ADC_REF_INTERNAL"; // Vref=.6v
                    zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>; //
                    zephyr,input-positive = <NRF_SAADC_VDD>; // battery
                    zephyr,resolution = <12>;
            };
    };

    &arduino_adc {
            io-channel-map = <0 &adc 1>, <1 &adc 2>, <2 &adc 4>, <3 &adc 0>, <4 &arduino_adc 0>, <5 &adc 7>;
    };

    // PuzL PWM (Buzzer)
    &pwm0_default {
            group1 {
                    psels = <NRF_PSEL(PWM_OUT0, 1, 15)>;
                    /delete-property/ nordic,invert; // sets PWM level=1 (no DC current)
            };
    };

    &pwm0_sleep {
            group1 {
                    psels = <NRF_PSEL(PWM_OUT0, 1, 15)>;
                    low-power-enable;
            };
    };

    // PuzL I2C (temp/humidity)
    &i2c0_default {
            group1 {
                    psels = <NRF_PSEL(TWIM_SDA, 0, 4)>,
                            <NRF_PSEL(TWIM_SCL, 0, 5)>;
            };
    };

    &i2c0_sleep {
            group1 {
                    psels = <NRF_PSEL(TWIM_SDA, 0, 4)>,
                            <NRF_PSEL(TWIM_SCL, 0, 5)>;
                    low-power-enable;
            };
    };

    // *****************************************************
    // Some default nordic settings do not apply for PuzL.
    // Disable unused peripherals to reduce power consumption.
    &button2 {
            status = "disabled";
    };
    &button3 {
            status = "disabled";
    };
    &led1 {
            status = "disabled";
    };
    &led2 {
            status = "disabled";
    };
    &led3 {
            status = "disabled";
    };
    &uart1 {
            status = "disabled";
    };
    &i2c1 {
            status = "disabled";
    };
    &spi0 {
            status = "disabled";
    };
    &spi1 {
            status = "disabled";
    };
    &spi2 {
            status = "disabled";
    };
    &spi3 {
            status = "disabled";
    };
    &usbd {
            status = "disabled";
    };

    &power {
            status = "disabled";
    };

    // ***************************************************** END *************************

    Gene

Reply
  • Runar,

    1.  I have not probed the pins with a logic analyzer.  It is not easy for me to do that.  In addition, since I can literally load one set of code on the hardware and have it work, while a different version on the same hardware does not work, I am struggling to see the value in this experiment.

    2.  I would have to see how difficult it would be to connect a RS232 connection to the nrf52840dk board, I don't know how I could test this on the DK board.

    3.  Attached is the overlay and prj.conf files.

    prj.conf:

    CONFIG_ASSERT_NO_FILE_INFO=n
    CONFIG_RESET_ON_FATAL_ERROR=n
    CONFIG_ASSERT_VERBOSE=y
    CONFIG_THREAD_NAME=y
    CONFIG_BOOT_BANNER=y
    CONFIG_PRINTK=y
    CONFIG_PRINTK_SYNC=y
    CONFIG_CONSOLE=y
    CONFIG_UART_CONSOLE=y
    CONFIG_RTT_CONSOLE=n
    CONFIG_SHELL=y
    CONFIG_OPENTHREAD_SHELL=y
    CONFIG_CHIP_LIB_SHELL=y
    CONFIG_SERIAL=y
    CONFIG_USE_SEGGER_RTT=n
    CONFIG_SHELL_BACKENDS=y
    CONFIG_SHELL_BACKEND_SERIAL=y
    CONFIG_SHELL_BACKEND_RTT=n
    CONFIG_LOG=n
    CONFIG_LOG_BACKEND_UART=n
    CONFIG_LOG_BACKEND_RTT=n
    #CONFIG_LOG_BACKEND_RTT_BUFFER=1
    CONFIG_LOG_MODE_MINIMAL=n
    #CONFIG_NFCT_PINS_AS_GPIOS=y # deprecated as of SDK v2.6.0
    CONFIG_PM_DEVICE=y
    CONFIG_I2C=y
    CONFIG_ADC=y
    CONFIG_PWM=y
    CONFIG_WATCHDOG=y
    CONFIG_WDT_DISABLE_AT_BOOT=y
    CONFIG_RAM_POWER_DOWN_LIBRARY=y

    # Start ** Additions for the PuzL ExtFlash part.
    CONFIG_FLASH=y
    CONFIG_SPI=y
    CONFIG_NORDIC_QSPI_NOR=y
    CONFIG_NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096
    CONFIG_OPENTHREAD_NORDIC_LIBRARY_MTD=y
    CONFIG_MPU_ALLOW_FLASH_WRITE=y
    # End ** Additions for the PuzL ExtFlash part.

    CONFIG_NET_L2_OPENTHREAD=y
    CONFIG_OPENTHREAD_MTD=y
    CONFIG_OPENTHREAD_MTD_SED=y
    CONFIG_CHIP=y
    CONFIG_CHIP_ENABLE_ICD_SUPPORT=y
    CONFIG_CHIP_ICD_IDLE_MODE_DURATION=120
    CONFIG_CHIP_ICD_ACTIVE_MODE_DURATION=300
    CONFIG_CHIP_ICD_SLOW_POLL_INTERVAL=1000
    CONFIG_CHIP_ICD_FAST_POLLING_INTERVAL=200

    CONFIG_CHIP_ENABLE_PAIRING_AUTOSTART=n
    CONFIG_CHIP_PROJECT_CONFIG="src/chip_project_config.h"
    CONFIG_CHIP_DEVICE_TYPE=67
    CONFIG_STD_CPP17=y
    CONFIG_DK_LIBRARY=n
    CONFIG_BT_DEVICE_NAME="PuzlMatter"

    CONFIG_THREAD_NAME=y
    CONFIG_MPU_STACK_GUARD=y
    CONFIG_CHIP_NFC_COMMISSIONING=n
    CONFIG_CHIP_FACTORY_DATA=y
    CONFIG_CHIP_FACTORY_DATA_BUILD=y

    # ***************************

    overlay file:

    /*
     * Copyright (c) 2021-2022 Nordic Semiconductor ASA
     *
     * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
     */

    // For more help, browse the DeviceTree documentation at docs.zephyrproject.org/.../index.html
    // You can also visit the nRF DeviceTree extension documentation at nrfconnect.github.io/.../nrfdevicetree.html

    / {
            /*
            * In some default configurations within the nRF Connect SDK,
            * e.g. on nRF52840, the chosen zephyr,entropy node is &cryptocell.
            * This devicetree overlay ensures that default is overridden wherever it
            * is set, as this application uses the RNG node for entropy exclusively.
            */
            chosen {
                    zephyr,entropy = &rng;
            };
    };

    // The 0x100 bytes of the PuzL MfgBlock starts at 0x20000000. To reserve it for Mfg we'll tell the
    // linker that it can put code related items starting at 0x20000100. This conflicts what is called
    // out in <SDK>/zephyr/dts/arm/nordic/nrf52840.dtsi but does take precedence.
    // Note: or alternatively specify with CONFIG_SRAM_... settings in prj.conf file.
    &sram0 {
        reg = < 0x20000100 (DT_SIZE_K(256)-0x100)>; /* PuzL: override stock 0x20000000 setting. */
    };

    /* PuzL Persistent Storage (Internal Flash).
            Note: puzl_partition is defined in
                      ./configuration/nrf52840dk_nrf52840/pm_static_dfu.yml
    */

    // PuzL Labs Quad Flash (External Flash).
    &qspi_default {
            group1 {
                    psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
                            <NRF_PSEL(QSPI_IO0, 0, 20)>,
                            <NRF_PSEL(QSPI_IO1, 0, 22)>,
                            <NRF_PSEL(QSPI_IO2, 0, 23)>,
                            <NRF_PSEL(QSPI_IO3, 0, 21)>,
                            <NRF_PSEL(QSPI_CSN, 0, 17)>;
                    nordic,drive-mode = <NRF_DRIVE_H0H1>;
            };
    };

    &qspi_sleep {
            group1 {
                    psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
                            <NRF_PSEL(QSPI_IO0, 0, 20)>,
                            <NRF_PSEL(QSPI_IO1, 0, 22)>,
                            <NRF_PSEL(QSPI_IO2, 0, 23)>,
                            <NRF_PSEL(QSPI_IO3, 0, 21)>;
                    low-power-enable;
            };
            group2 {
                    psels = <NRF_PSEL(QSPI_CSN, 0, 17)>;
                    low-power-enable;
                    bias-pull-up;
            };
    };

    / {
            chosen {
                    nordic,pm-ext-flash = &mx25r64;
            };
    };

    // PuzL Labs Button and LED
    &button0 {
            gpios = <&gpio0 30 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
    };
    &led0 {
            gpios = <&gpio0 14 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN | (1 << 8))>; //(1<<8) sets high drive stength.
    };

    &button1 {
            gpios = <&gpio0 2 (GPIO_ACTIVE_HIGH )>; //| GPIO_PULL_DOWN)>; do not set pull-dwn as default so gpio_pin_configure_dt can config
    };

    // PuzL UART
    &uart0_default {
            group1 {
                    psels = <NRF_PSEL(UART_TX, 0, 10)>;
            };
            group2 {
                    psels = <NRF_PSEL(UART_RX, 0, 9)>;
            };
    };

    &uart0_sleep {
            group1 {
                    psels = <NRF_PSEL(UART_TX, 0, 10)>,
                            <NRF_PSEL(UART_RX, 0, 9)>;
            };
    };

    // PuzL ADC
    / {
            zephyr,user {
                    io-channels = <&adc 4>,<&adc 7>;
            };
    };

    &adc {
            #address-cells = <1>;
            #size-cells = <0>;

            channel@4 {
                    reg = <4>;
                    zephyr,gain = "ADC_GAIN_1_4"; // gain=1/4 VDD/4/(1/4)=VDD FS
                    zephyr,reference = "ADC_REF_VDD_1_4"; // VDD/4       
                    zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
                    zephyr,input-positive = <NRF_SAADC_AIN4>; // P0.28
                    zephyr,resolution = <12>;
            };
            channel@7 {
                    reg = <7>;
                    zephyr,gain = "ADC_GAIN_1_6"; // gain=1/6 .6/(1/6)=3.6v FS
                    zephyr,reference = "ADC_REF_INTERNAL"; // Vref=.6v
                    zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>; //
                    zephyr,input-positive = <NRF_SAADC_VDD>; // battery
                    zephyr,resolution = <12>;
            };
    };

    &arduino_adc {
            io-channel-map = <0 &adc 1>, <1 &adc 2>, <2 &adc 4>, <3 &adc 0>, <4 &arduino_adc 0>, <5 &adc 7>;
    };

    // PuzL PWM (Buzzer)
    &pwm0_default {
            group1 {
                    psels = <NRF_PSEL(PWM_OUT0, 1, 15)>;
                    /delete-property/ nordic,invert; // sets PWM level=1 (no DC current)
            };
    };

    &pwm0_sleep {
            group1 {
                    psels = <NRF_PSEL(PWM_OUT0, 1, 15)>;
                    low-power-enable;
            };
    };

    // PuzL I2C (temp/humidity)
    &i2c0_default {
            group1 {
                    psels = <NRF_PSEL(TWIM_SDA, 0, 4)>,
                            <NRF_PSEL(TWIM_SCL, 0, 5)>;
            };
    };

    &i2c0_sleep {
            group1 {
                    psels = <NRF_PSEL(TWIM_SDA, 0, 4)>,
                            <NRF_PSEL(TWIM_SCL, 0, 5)>;
                    low-power-enable;
            };
    };

    // *****************************************************
    // Some default nordic settings do not apply for PuzL.
    // Disable unused peripherals to reduce power consumption.
    &button2 {
            status = "disabled";
    };
    &button3 {
            status = "disabled";
    };
    &led1 {
            status = "disabled";
    };
    &led2 {
            status = "disabled";
    };
    &led3 {
            status = "disabled";
    };
    &uart1 {
            status = "disabled";
    };
    &i2c1 {
            status = "disabled";
    };
    &spi0 {
            status = "disabled";
    };
    &spi1 {
            status = "disabled";
    };
    &spi2 {
            status = "disabled";
    };
    &spi3 {
            status = "disabled";
    };
    &usbd {
            status = "disabled";
    };

    &power {
            status = "disabled";
    };

    // ***************************************************** END *************************

    Gene

Children
Related