GPIO Digital Input nRF9151

Dear Nordic support,

I was reading the Technical Documentation in the GPIO section for the nRF9151, and I came across this blurb:

"Note: When a pin is configured as digital input, care has been taken to minimize increased current consumption when the input voltage is between VIL and VIH. However, it is a good practice to ensure that the external circuitry does not drive that pin to levels between VIL and VIH for a long period of time."

I originally designed my sensor to continually drive a digital input pin high, and then the nordic chip would wake from a low level trigger. Based on the blurb above, I have inverted the sensor's output and can now wake the nordic chip from a high level trigger.

Even with this change, due to this application's use-case, it's possible that the digital input pin could be driven high for up to 7 days at a time.

My questions are:

  1. What is considered "a long period of time"?
  2. What are the downsides to driving a digital input pin high for a few days?
  3. If the downside is increased current consumption, what is the input impedance of a digital input pin?
  4. Are there any other considerations I should be aware of?

Thank you for your support! I've been really enjoying getting to know the Nordic products so far.

Parents
  • The guidance is vague, and technically correct but misleading. The note refers to the vanishingly-small voltage window typically near VDD/2 where both input FETs on an input pin are slightly turned on leading to a phenomenon known as Feedthrough (or Delta ICC) where perhaps 100uA or so can be seen flowing through the input FETs between the internal VDD and internal Gnd rails. Finding this transition and demonstrating the effect is hard; with 100,000 devices in the field each with an input pin that is allowed to float of course will guarantee a problem with batteries not lasting as long as expected.

    Driving an input pin to the usual high and low levels close to VDD or close to Gnd will never exhibit this effect. Here is a more detailed description, as this affects all devices not just Nordic (first noted in the early 1980s by Phillips on their 8051):

    Implications of Slow or Floating CMOS Inputs scba004e

  • Thank you for the information and the resource, that makes sense. From the TI document, it sounds like all of these issues crop up if the input is left floating, which is not my situation.

    In my use case, the GPIO input will always be driven to ~VDD, so it sounds like I won't run into any issue.

    I would still be curious if someone from Nordic takes a look into this on Monday.

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  • Thank you for the information and the resource, that makes sense. From the TI document, it sounds like all of these issues crop up if the input is left floating, which is not my situation.

    In my use case, the GPIO input will always be driven to ~VDD, so it sounds like I won't run into any issue.

    I would still be curious if someone from Nordic takes a look into this on Monday.

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