MPSL ASSERT: 112, 1617 on single board, suspect hardware

[Anthony Ambuehl]

NCS 2.7.0, NRF52840, SYSBUILD with MCUBOOT

We have 1 specific board which is failing with a hardfault and assert MPSL ASSERT: 112, 1617   it occurs whenever we activate bluetooth.  Other boards of the same PCB do not have this problem.  This board previously did not have a problem but recently started.

!) Any idea what might be the root cause for the assertion?

2) If this would be caused by a hardware issue, is it possible for us to create a specific manufacturing test software to catch the issue?

[Priyanka]

Hi Anthony,

This must be a hardware related issue since you do not see this on other boards. Could be an issue with the 32MHz HFCLK, maybe the supply to this, or soldering round the crystal or the crystal itself. I would suggest you to examine the crystal and it's related components and it's surrounding/connected area on the PCB. 

Regards,

Priyanka

[Anthony Ambuehl]

could give any info on the MPSL assertion.. what do the number mean?

[Priyanka]

Hi Anthony,

The assert points to missing/not ramped-up HFXO for a radio event that requires it.

-Priyanka

[Anthony Ambuehl]

Is there a way I can make a specific test to enable the HFXO and check that it is ramped up?  Maybe its under CONFIG_CLOCK_CONTROL?

We need this to diagnose root cause of failures in the manufacturing test.  Currently it passes all tests but asserts, which leaves the manufacturing team confused.

[Priyanka]

HI Anthony,

I am discussing this with the team and will get back to you as soon as I hear from them. Also, were you able to re-check the soldering etc. that I had mentioned earlier?

-Priyanka

[Anthony Ambuehl]

I created a test, but it is not showing a failure.

    //request HFCLK to be running
    int ret = clock_control_on(clock0, CLOCK_CONTROL_NRF_SUBSYS_HF);
    if (ret) {
        LOG_ERR("HF clock enable failed %d",ret);
    }
    nrf_clock_hfclk_t hfclk_src;
	clkstat = clock_control_get_status(clock0, CLOCK_CONTROL_NRF_SUBSYS_HF);
	running = nrf_clock_is_running(NRF_CLOCK, NRF_CLOCK_DOMAIN_HFCLK, &hfclk_src);
    if ((CLOCK_CONTROL_STATUS_ON != clkstat) || !running)
    {
        LOG_ERR("HF clock not running");
    }
    else if (NRF_CLOCK_HFCLK_HIGH_ACCURACY != hfclk_src)
    {
        LOG_ERR("HF clock wrong source %d",hfclk_src);
    } 
    else {
        ret =   clock_control_off(clock0, CLOCK_CONTROL_NRF_SUBSYS_HF);
        if (ret) {
            LOG_ERR("HF clock disable failed %d",ret);
        }
        else
        {
            LOG_INF("HF clock is working");
        }
    }

[Anthony Ambuehl]

I also notice that if my mfg test code starts the HFCLK but does not turn it off, I no longer get the MPSL assertion.  It seems possibly the failure is related to increased start up time exceeding some limit within MPSL.  

I could measure the time for clock_control_on to complete and set a maximum threshold to match the MPSL library.  

Can you tell me what startup time would be too high for MPSL ?

[Anthony Ambuehl]

On this page: https://docs.nordicsemi.com/bundle/ncs-latest/page/nrfxlib/mpsl/doc/clock.html

it says the startup time must be less than 1.5mS.