How to reduce the power consumption of nrf54l15

[Ethan330]

The broadcast interval is 2s, and the power consumption is 7ua on the DK board; On this basis, the power consumption when using an external low-speed crystal oscillator is 8.8ua.

What else can I do to reduce power consumption?

I still want to try turning off GPOTE, but the software compilation failed. Please tell me how to turn off GPOTE and whether it will reduce power consumption。

Software version: v2.9.1; sample：Google locator tag。

This is the version I just updated, and using v2.8.0 seems to have higher power consumption. I don't understand why.

[Håkon Alseth]

Hi,

 

Can you share a close up of the dynamic current consumption? I want to see the sleep levels that you are seeing.

Given that the calculator states approx. 1.4 uA away from the target current, I suspect that your firmware is more-or-less optimized. Have you done any specific changes to the application itself?

Which version of the nRF54L15-DK are you using when testing?

 

Kind regards,

Håkon

[Ethan330]

export.xlsxThis is the power consumption data exported by my power monitor device（1.2s adv, External crystal , 0dbm, payload 20bytes）。

Håkon Alseth said:

Which version of the nRF54L15-DK are you using when testing?

This is my NRF54L15 development board：

[Håkon Alseth]

Hi,

 

Thank you for sharing.

Your configuration indicates that you are using internal 32kHz RC oscillator, which will add approx. 1 uA due to calibration.

There is an static offset of approx. 3-4 uA in your measurements - Could you try to check with an ampere-meter to see if the measurements are still offset with this smaller current?

 

Kind regards,

Håkon

[Ethan330]

I am currently using my custom board to test the power consumption, which is 12.4ua(1.2s adv,internal 32k rc,0dbm,payload 26bytes). This custom board has removed other chips, leaving only NRF54L15.

As shown in the following figure：

Difference from calculation result by 2.4ua。

The configuration file generated by code compilation is as follows：

8546.zephyr.dts3678.config.txt

How else can I optimize software to reduce power consumption？

[Håkon Alseth]

Hello,

 

I flashed the unmodified sample, as this:

west build -b nrf54l15dk/nrf54l15/cpuapp -- -DFILE_SUFFIX=release

And here is the sleep current, ie. the current in between the radio pulses:

You shall expect to see 2 - 3.5 uA in between the peaks.

Could you please also measure the same? It does seem that yours is higher, which can explain why you are seeing a difference between the calculation and real-life measurement.

  

Please also be aware that the online power profiler is meant as an approximation, and is modeled after real measurements. This means that you will see a difference between the calculated and the measured current consumption.

 

I also tried your .config, and saw the same current consumption levels.

 

Kind regards,

Håkon

[Ethan330]

Thank you for your reply

Håkon Alseth said:

I flashed the unmodified sample, as this:

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west build -b nrf54l15dk/nrf54l15/cpuapp -- -DFILE_SUFFIX=release

XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

west build -b nrf54l15dk/nrf54l15/cpuapp -- -DFILE_SUFFIX=release

And here is the sleep current, ie. the current in between the radio pulses:

Your test results differ from the calculated values by nearly 21ua, indicating that power consumption can be reduced by optimizing software configuration。

So I would like to ask which software configurations can be modified to reduce power consumption？

For example, will the following configuration have an effect?

CONFIG_RAM_POWER_DOWN_LIBRARY=y

CONFIG_APP_USE_RETAINED_MEM=y

&gpio1{

    status="ok";

    sense-edge-mask=<0xffffffff>;

};

Or disable some unnecessary kernel functions？

[Håkon Alseth]

Hi,

Ethan330 said:

Your test results differ from the calculated values by nearly 21ua, indicating that power consumption can be reduced by optimizing software configuration

The nRF54L15 DK runs at 1.8V (measured 1.81V to be exact). You need to adjust for this in the calculator.

 

The point of my measurement is to show that the sleep current in my test is indeed lower than your measured sleep current, and it is even lower than the expected level in the online power profiler (3.3 uA). This is due to chip-to-chip variances, as well as environment (temperature etc).

  

Kind regards,

Håkon