Weak Pin Drive Strength on nRF5340 DK Leading to SPI Communication Failure with ICM-42688-P

[MatryoshkaLJY]

I am using the Nordic nRF5340 DK to communicate with the ICM-42688-P sensor via SPI. However, the sensor does not respond to the MCU's commands. After observing the SPI clock (SCLK) waveform with an oscilloscope. I noticed that the rise and fall times of the clock signal are excessively long, which violates the sensor’s timing requirements.

I configured the SCLK GPIO pin’s drive strength to H0H1 but the issue persists. Following is my code using nrfx driver:

/* configurations in prj.conf
CONFIG_GPIO=y
CONFIG_LOG=y
CONFIG_SPI=y
CONFIG_NRFX_SPIM4=y
*/

#include <zephyr/kernel.h>
#include <zephyr/logging/log.h>
#include <zephyr/device.h>
#include <zephyr/drivers/spi.h>
#include <zephyr/sys/printk.h>

#include <nrf.h>
#include <nrfx_spim.h>
#include <nrfx_gpiote.h>
#include <hal/nrf_gpio.h>

#include <stdio.h>
#include <string.h>

LOG_MODULE_REGISTER(nrf_imu, 4);

nrfx_spim_t spim = NRFX_SPIM_INSTANCE(4);

#define SPI_SCK_PIN   NRF_GPIO_PIN_MAP(1, 15)
#define SPI_MOSI_PIN  NRF_GPIO_PIN_MAP(1, 13)
#define SPI_MISO_PIN  NRF_GPIO_PIN_MAP(1, 14)
#define SPI_CSN_PIN   NRF_GPIO_PIN_MAP(1, 12)

#define NRFX_CUSTOM_ERROR_CODES 0 //used in nrfx_errors.h

nrfx_spim_config_t spim_config = NRFX_SPIM_DEFAULT_CONFIG(SPI_SCK_PIN, SPI_MOSI_PIN, SPI_MISO_PIN, SPI_CSN_PIN);

uint8_t ret = 0x00;

static volatile bool
	spim_xfer_done;

void spim_event_handler(nrfx_spim_evt_t const *p_event, void *p_context)
{
	spim_xfer_done = true;
}

int main(void)
{
    LOG_INF("Hello");
    spim_xfer_done = false;
    spim_config.orc = 0x47;
	nrfx_spim_init(&spim, &spim_config, spim_event_handler, NULL);

    nrf_gpio_cfg(
        SPI_SCK_PIN,
        NRF_GPIO_PIN_DIR_OUTPUT,
        NRF_GPIO_PIN_INPUT_DISCONNECT,
        NRF_GPIO_PIN_NOPULL,
        NRF_GPIO_PIN_H0H1,
        NRF_GPIO_PIN_NOSENSE
    );

    uint8_t tx_buffer[2] = {0x76, 0x00};
    uint8_t rx_buffer[2] = {0x00, 0x00};

    nrfx_spim_xfer_desc_t transfer = NRFX_SPIM_XFER_TX(tx_buffer, sizeof(tx_buffer));
    nrfx_spim_xfer(&spim, &transfer, 0);
    k_usleep(100);

    tx_buffer[0] = 0x11;
    tx_buffer[1] = 0x01; 

    nrfx_spim_xfer(&spim, &transfer, 0);
    k_msleep(2);

    tx_buffer[0] = 0xF5;
    tx_buffer[1] = 0x00; 

    nrfx_spim_xfer_desc_t tr = NRFX_SPIM_XFER_TRX(tx_buffer, sizeof(tx_buffer), rx_buffer, sizeof(rx_buffer));
    nrfx_spim_xfer(&spim, &tr, 0);

    LOG_INF("received %d %d", rx_buffer[0], rx_buffer[1]);
}

Then I Cross-tested with an nRF51822-based third-party development board, The SPI interface works, with successful communication.

1. Are there additional configurations (e.g., slew rate, pin control settings) to further optimize the GPIO output characteristics on the nRF5340?

2. Could this be related to hardware design limitations (e.g., pull-up/down resistors, trace impedance) on the nRF5340 DK?

3. Are there known workarounds or firmware adjustments to mitigate this issue?

[Einar Thorsrud]

Hi,

Are there additional configurations (e.g., slew rate, pin control settings) to further optimize the GPIO output characteristics on the nRF5340?

The pins are configured as high drive for both low and high state, and there is nothing more you can do in that regard. However, you could double-check the PIN_CNF register for the clock pin with a debugger to verify that it really has high drive enabled?

Could this be related to hardware design limitations (e.g., pull-up/down resistors, trace impedance) on the nRF5340 DK?

Yes. Though these pins are not used for anythign specical, so I wonder if it could be related to other/external parts of the cuircuitry, for instance if you have very long wires? Or are there other things that could introduce higher capacitance on thei SPI lines? Can you share a photo of your setup?

Are there known workarounds or firmware adjustments to mitigate this issue?

Not other than ensuring you have high drive. In addition to checking the register, you can also see where it is confiugred in the nrfx driver, nrfx_spim.c.

[MatryoshkaLJY]

Thanks for your reply. I double-checked the PIN_CNF register and the drive strength is H0H1. I shortened the signal path, mounted the sensor pcb directly to the DK. Following is my current setup, the sensor is on the green PCB.

Now when I set the drive strength H0H1, spi frequency 4MHz, it works, but fails when I set higher frequency or weaker drive strength.

[Einar Thorsrud]

I see. Could there be a lot of capacitance on the sensor board for some reason? Seem unlikely, but it would be interesting if you could measure the clock signal directly on the DK, with the sensor disconected. Does the clock signal look better then?

[MatryoshkaLJY]

Sure. I measured the clock signal with sensor disconnected.

And the waveform looks like this. 

Attaching the probe to the clk pin leads to communication failure when the sensor is connected to the DK.

[Einar Thorsrud]

That is interesting, I wonder if the probe is a problem in itself here. And the measuremnts look odd. Do you have a higher impedance probe you can use? And is the probe properly calibrated with the oscillioscope?

[MatryoshkaLJY]

The probe is calibrated, I'll try to find a higher impedance probe.

Thanks for your help, my development can be continued.