Hi,
I'm using the nRF54L15 DK (non-secure, NCS v2.9.1) to generate a 100 kHz PWM on a GPIO with TIMER00 (128 MHz, 1280 ticks, 2.5%–20% duty, 32–256 ticks). GPIOTE, DPPI, and PPIB drive the PWM, avoiding the PWM driver.
Setup:
- Software: NCS v2.9.1, Zephyr RTOS, VS Code with nRF Connect, west 1.2.0
- Hardware: nRF54L15 DK, chip build code unknown (standard DK)
- Platform: Windows 11, 64-bit
- Config: CONFIG_NRFX_TIMER00=y, CONFIG_NRFX_GPIOTE20=y, CONFIG_NRFX_DPPI20=y, CONFIG_NRFX_PPIB20=y, CONFIG_PWM=n
- Code: TIMER00 (32-bit, PRESCALER=0), HFCLK via TASKS_XOSTART/XO.STAT (HFXO, 32 MHz), timer re-start for duty ≤96 ticks (errata [25] workaround)
Symptoms:
- With RTT (CONFIG_USE_SEGGER_RTT=y): Duty cycles are correct (oscilloscope):
- 32 ticks: 2.5% (~0.25 µs high)
- 64 ticks: 5% (~0.5 µs)
- 96 ticks: 7.5% (~0.75 µs)
- 128 ticks: 10% (~1 µs)
- 140 ticks: 10.9375% (~1.094 µs)
- 256 ticks: 20% (~2 µs)
- Without RTT (CONFIG_USE_SEGGER_RTT=n): Duty cycles ≤140 ticks are too low:
- 32 ticks: ~0% (flat)
- 64 ticks: ~2–3%
- 96 ticks: ~4–5%
- 128 ticks: ~7–8%
- 140 ticks: ~8–9%
- 256 ticks: Correct (~20%, 2 µs)
- Period stays 10 µs (100 kHz). A GPIO toggle confirms the loop runs every 4 seconds. No hard faults.
Issue: Duty cycles ≤140 ticks are incorrect without RTT, possibly due to TIMER00 event timing or HFCLK stability. I’ve tried longer HFCLK timeouts, clearing events, and re-setting CC registers, but no improvement.
Questions:
- Why do low duty cycles fail without RTT on nRF54L15?
- Any TIMER00 or HFCLK configs to stabilize PWM?
- Known errata affecting TIMER00 or clock beyond [25] in NCS v2.9.1?
I can share sanitized code or logs if needed. Thanks for any help!
