Our design has an nRF5340 with a 32 MHz high frequency crystal and an accurate 32 kHz external rail to rail clock chip (+/- 5 ppm @ 25 C). We would like to measure the actual frequency of the HFXO frequency using the 32 kHz clock. I'm using the following procedure to do this:
1) Configure the low frequency clock source to be the external clock and setup to always run.
2) Configure the high frequency clock source to be the external crystal and setup to always run.
3) Setup an RTC with no prescaler.
4) Setup an RTC compare register so that it triggers a DPPI channel trigger that generates a TIMER start task.
5) Setup an RTC compare register for 32768 counts alter so that it triggers a DPPI channel trigger that generates a TIMER stop task.
6) The second compare generates an interrupt where the TIMER count is read.
This procedure seems to work. A value of close to 16,000,000 is captured each time this is run. The documentation says the RTC "COMPARE to COMPARE ± 62.5 ns". So I would expect multiple runs close in time to vary by only a small amount.
However, running this procedure 10 times generates values that vary by more than I would expect. For example, from 16,001,396 to 15,999,801. That is a difference of about 100 ppm. This seems quite large especially since the HFXO should be +/- 30 ppm max and the RTC specification is +/-5 ppm.
Does the above procedure look correct? Should this be repeatable to within a few counter ticks?
