nRF5340 with RV3028C7 external clock EVENTS_LFCLKSTARTED not triggering

[denis]

Our design has an nRF5340 with RV3028C7 to provide the 32 kHz clock via P0.00.

If I configure P0.00 as a digital input, I can see the pin toggling.

However, if I use the code below to try and switch from to the external clock, the EVENTS_LFCLKSTARTED doesn't happen.  Any idea why this would be?

NRF_CLOCK->LFCLKSRC = CLOCK_LFCLKSRC_SRC_LFXO << CLOCK_LFCLKSRC_SRC_Pos;

NRF_OSCILLATORS->XOSC32KI.INTCAP = OSCILLATORS_XOSC32KI_INTCAP_INTCAP_External << OSCILLATORS_XOSC32KI_INTCAP_INTCAP_Pos;

NRF_OSCILLATORS->XOSC32KI.BYPASS = OSCILLATORS_XOSC32KI_BYPASS_BYPASS_Enabled << OSCILLATORS_XOSC32KI_BYPASS_BYPASS_Pos;

NRF_P0->PIN_CNF[0] = GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos |

GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos |

GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos |

GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos;

NRF_P0->PIN_CNF[1] = GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos |

GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos |

GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos |

GPIO_PIN_CNF_INPUT_Disconnect<< GPIO_PIN_CNF_INPUT_Pos;

NRF_CLOCK->LFCLKALWAYSRUN = CLOCK_LFCLKALWAYSRUN_ALWAYSRUN_AlwaysRun << CLOCK_LFCLKALWAYSRUN_ALWAYSRUN_Pos;

NRF_CLOCK->EVENTS_LFCLKSTARTED = 0;

NRF_CLOCK->TASKS_LFCLKSTART = 1;

uint32_t count = 0;

while (NRF_CLOCK->EVENTS_LFCLKSTARTED == 0) {

// wait for LFCLK to start

++count;

}

[runsiv]

Hi

I think you in order to use an external source, configure LFCLKSRC.SRC=LFXO as mention here. I'm not sure how Zephyr will handle changing clock source after init. So it might be an idea to configure zephyr to use the LFXO and create a function that sets your register in the init. 

Due to easter vacation here in Norway we will not be able to get back to you until next week. Thank you for your understanding

Regards

Runar

[denis]

The first line in the code above is setting  LFCLKSRC.SRC=LFXO.

I've tried using config properties to enable the LFXO also, but it hangs:

CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL=y

CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=n

CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC_CALIBRATION=n

CONFIG_CLOCK_CONTROL_NRF_K32SRC_20PPM=y

 

arch_cpu_atomic_idle(unsigned int key) (/Users/denis/sandbox/pison/workspace/zephyr/arch/arm/core/cortex_m/cpu_idle.c:134)
k_cpu_atomic_idle(unsigned int key) (/Users/denis/sandbox/pison/workspace/zephyr/include/zephyr/kernel.h:6017)
lfclk_spinwait(enum nrf_lfclk_start_mode mode) (/Users/denis/sandbox/pison/workspace/zephyr/drivers/clock_control/clock_control_nrf.c:515)
z_nrf_clock_control_lf_on(enum nrf_lfclk_start_mode start_mode) (/Users/denis/sandbox/pison/workspace/zephyr/drivers/clock_control/clock_control_nrf.c:571)
sys_clock_driver_init() (/Users/denis/sandbox/pison/workspace/zephyr/drivers/timer/nrf_rtc_timer.c:766)
z_sys_init_run_level(enum init_level level) (/Users/denis/sandbox/pison/workspace/zephyr/kernel/init.c:374)
z_cstart() (/Users/denis/sandbox/pison/workspace/zephyr/kernel/init.c:782)
z_prep_c() (/Users/denis/sandbox/pison/workspace/zephyr/arch/arm/core/cortex_m/prep_c.c:209)
z_arm_reset() (/Users/denis/sandbox/pison/workspace/zephyr/arch/arm/core/cortex_m/reset.S:169)

So it seems that the LFXO isn't able to start for some reason.

If I setup P0.00 has a digital input and use DPPI to count a TIMER, then I do see a 32 kHz counting rate on that timer.  So the digital 32 kHz signal is present at P0.00.

[Vidar Berg]

I suggest you verify that you are able this clock source on a board which you can attach a debugger first. 

denis said:

Is there some way to have the just new application firmware change from LFRC to LFXO, without the network firmware having issues?

I'm not sure what the issue is in your case. I tried to reproduce by testing the peripheral_lbs sample in SDK v.3.0.0 with LFXO selected in the app and LFRC selected on the netcore. This is of course not optimal as the network core will continue to request calibration of the LRFC.

For more details, see the CLOCK — Clock control and the OSCILLATORS — Oscillator control chapter

[denis]

In our application, if the application has:

CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL=y

CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=n

CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC_CALIBRATION=n

CONFIG_CLOCK_CONTROL_NRF_K32SRC_20PPM=y

 

and the network has:

CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL=n

CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y

CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC_CALIBRATION=y

CONFIG_CLOCK_CONTROL_NRF_K32SRC_500PPM=y

 

BLE will work for a few connections, but after about one hour it stops advertising.

How long did you run your test?

[denis]

I setup peripheral_lbs with sysbuild/ipc_radio.conf to use LFRC, keeping the application using crystal, and was able to reproduce advertising stopping after about 1 hour with a few intermittent connections.  Same as in my app.  Can you give this a try to reproduce?

CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL=n

CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y

CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC_CALIBRATION=y

CONFIG_CLOCK_CONTROL_NRF_K32SRC_500PPM=y

[Vidar Berg]

Sure, I can try to reproduce this. Did you test with SDK v3.0.x as well?

EDIT: I started a simple test that I will let run over night. I used the peripheral_lbs sample from v3.0.1 and applied the clock configuration you posted. In addition I set CONFIG_RESET_ON_FATAL_ERROR=n on both cores to avoid masking any runtime errors.

[denis]

I did not.  We are in production and still using 2.9.x (because of all the changes needed to move to 3.0.x we won't be moving to that version quite yet)..