Hi,
We have experienced some unknown resets in our devices specifically when woken up after being in storage for a prolonged period in ULP mode - about a year or so. Afterwards when we got the device into research to try and find the cause of reset, it worked fine.
We have a device using nRF52832 where during ULP mode, the device is powered directly from a 3V non-rechargeable battery. When the device wakes up, it enables a 3.3V DC\DC boost which then, through a diode OR circuit, replaces the battery voltage. This in theory could create a ~400mV voltage spike on the nRF52's VDD. The datasheet mentions that A step increase in supply voltage of 300 mV or more, with rise time of 300 ms or less, within the valid supply range, may result in a system reset.
We suspected that might be the cause of unexplained resets, however under lab conditions we only managed to induce a reset at about ~650mV spike which shouldn't really happen in our circuit. The device is IP67 and stored in a conditioned warehouse so there shouldn't be any change in temperature or humidity that would affect the battery resistance.
I was wondering if there are more details about the VDD spike reset. What conditions could affect it? If the spike is much faster than 300ms (as the datasheet points out) and it is actually about 2ms like in our case, does that change anything? The datasheet says it "may" cause a reset - is there a statistical analysis of the reset probability under these conditions?
Thanks,
Eyal