Hi,
I am developing a project where we wish to use part of the RRAMC memory for logging purpose. The documentation show that the data endurance of RRAMC in nRF54L15 chips is at the level of 1e4. That is surprisingly low giving that the ReRAM chips on the market gives us 5e5 up to 1e6 erase - write cycles. Is it tested value or estimated by the technology. What to expect after exceeding this number of writes. I get it that Nordic chooses the solutions that focuses on low power more than endurance. Just wont to know what I can expect. Would I get any error notification or memory can just fail silently and the value that I read back would not match the value written?
It makes us little nervous about properly implementing file system with wear leveling and marking bad blocks.
I am reading through the documentation: docs.nordicsemi.com/.../rramc.html
Could you please elaborate more about EVENTS_ACCESSERROR event and ECC.ERRORADDR and ACCESSERRORADDR as the documentation I can find is quite limited in that topic and I also cannot find any usage of this registers in the samples. Especially ECC.ERRORADDR seems to be implemented only on HAL level, not used then in the drivers.
As I wish to detect memory failing as soon as possible there are my questions:
EVENTS_ACCESSERROR
When would be generated. May I expect it to be generated if the write fails? Or would it be generated only if the memory cannot be read? Would it be generated if the ECC fails to recover?
ACCESSERRIRADDR
Would it also cover ECC errors or ECC errors are present only in ECC.ERRORADDR.
ECC.ERRORADDR
Is is connected with EVENTS_ACCESSERROR? Documentation says that the event ECCERROR is generated. I cannot find ECCERROR event in the documentation.
