nRF5340 ADC resolution vs conversion time

[Wolfgang R]

Hi all,

do different settings of SAADC RESOLUTION register affect Conversion Time tCONV?
I cannot find any dependency - the only value given for tCONV is 2 µs typ (7.29.12.1 SAADC Electrical Specification in PS v1.6).

If tCONV is independent of RESOLUTION: what would be the benefit of using less then max RESOLUTION?

Regards,
Wolfgang

[Priyanka]

Wolfgang R said:

Q2: Is the ADC clock stable relative to PCLK16M, or does it vary, e.g. over temperature?

Product spec S v1.6 says in 7.29.13 Performance factors: 
"... startup times of regulators and references will contribute to variability."
There doesn't seem to be any option to enable ADC hardware other than START, so it seems the ADC manages startup and shutdown of regulators and references automatically.

Clock stability shouldn’t be a big concern here if HFXO is present. Then the accuracy of ADC clock is mostly dependent on HFXO accuracy, which is roughly +/-60 ppm over ETC.HFXO is present. Then the accuracy of ADC clock is mostly dependent on HFXO accuracy, which is roughly +/-60 ppm over ETC.
To achieve better ADC performance, TIMER module should be used. The internal TIMER runs on clock source PCLK16M and PCLK1M.

Wolfgang R said:

Under which conditions do regulators and references start or shut down and restart so that their startup times come to effect?

To start an ADC, first ENABLE = 1, ADC gives access to the analog input pins. Then the ADC resources are started by triggering the START task. To start sampling, if you picked internal TIMER, it is sufficient to trigger SAMPLE task only once in order to start the SAADC and triggering the STOP task will stop sampling. ENABLE = 0 if one wants to disable ADC.

Also please note the following:

Mentioned jitter is from the clock source (PCLK32M), clock path through digital domain etc. It is hard to give a specific number. Please note that the startup only happens once before the ADC sampling is triggered. It is purely digital controlled. Jitter should not be an issue for the startup time of SAADC, but jitter can affect the accuracy when doing continuous mode sampling and a time series analysis of the results. So again, please use the TIMER module, HFXO clock source, and Constant Latency mode to achieve the best performance.

-Priyanka